UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 401

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UPD78F1201MC-CAB-AX

Manufacturer Part Number
UPD78F1201MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1201MC-CAB-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
7.5.3 Operation as 6-phase PWM output function
can be output.
5, slave channel 6, slave channel 7 are output. Slave channel 1 can be operated in any operation mode.
from the TOm pin. TCRm loads the value of TDRm to TCRm, using INTTM00 of the master channel as a start trigger,
and starts counting down. When TCRm = 0000H, TCRm outputs INTTMm and stops counting until the next start
trigger (INTTM00 of the master channel) has been input. The output level of TOm becomes active one count clock
after generation of INTTM00 from the master channel, and inactive when TCRm = 0000H.
INTTM00 of the master channel).
By extending the PWM function and using seven channels in combination, a six PWM saw tooth wave modulation
A total of six PWM output signals, one each from slave channel 2, slave channel 3, slave channel 4, slave channel
The period and duty factor of an output pulse can be calculated by the following expressions.
TCR00 of the master channel operates in the interval timer mode and counts the periods.
With the 6-phase PWM output function, the operation mode of slave channel 1 can be set freely.
(To use the modulated-output function, slave channel 1 is used as the real-time output trigger generation channel.
For details of the this function, refer to 7.5.13
TCRm of slave channels 2 to 7 operates in one-count mode, counts the duty factor, and outputs a PWM waveform
TDR00 and TDRm of the master channel and slave channel become valid from the next period (generation of
Cautions 1. To rewrite both TDR00 of the master channel and TDRm of slave channels 2 to 7, write access
Remark m = 02 to 07
function(type 1).)
Pulse period = {Set value of TDR00 (master) + 1} × Count clock period
Duty [%] = {Set value of TDRm (slave)}/{Set value of TDR00 (master) + 1} × 100
0% output: Set value of TDRm (slave) = 0000H
100% output: Set value of TDRm (slave) ≥ Set value of TDR00 (master) + 1
Remark Although the duty value exceeds 100% if the set value of TDRm (slave) > {set value of TDR00
2. TS00 or TSm cannot be set to “1” (forcible restart) while TE00 = 1 or TEm = 1. If TS00 or TSm
is necessary at least twice. Since the values of TDR00 and TDRm are loaded to TCR00 and
TCRm after INTTM00 is generated from the master channel, if rewriting is performed
separately before and after generation of INTTM00 from the master channel, the TOm pin
cannot output the expected waveform. To rewrite both TDR00 of the master and TDRm of the
slave, be sure to rewrite both the registers immediately after INTTM00 is generated from the
master channel.
is set to “1” while TE00 = 1 or TEm = 1, the counter value (TCR00 or TCRm) will be illegal and
TO00 or TOm will not be able to output the expected waveform.
(master) + 1}, it is summarized into 100% output.
CHAPTER 7 INVERTER CONTROL FUNCTIONS
User’s Manual U19678EJ1V1UD
Operation as non-complementary modulation output
399

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