UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 286

• Manufacturer Part Number: UPD78F1201MC-CAB-AX
• Description: MCU 16BIT 78K0R/LX3 30-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1201MC-CAB-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

284
Address: F0190H, F0191H (TMR00) to F019EH, F019FH (TMR07)
Symbol
TMRn
Note These settings are used with the inverter control function. For the inverter control function, refer to
Remark
F01C8H, F01C9H (TMR08) to F01CEH, F01CFH (TMR11)
Only the even channel can be set as a master channel (MASTERn = 1).
Be sure to use odd-numbered channels as slave channels (MASTERn = 0).
Clear MASTERn to 0 for a channel that is used with the independent channel operation function.
If both the edges are specified when the value of the STSn2 to STSn0 bits is other than 010B, set the CISn1 to
CISn0 bits to 10B.
MAS
TER
STS
CKS
CHAPTER 7 INVERTER CONTROL FUNCTIONS.
CIS
Other than above
n2
n1
15
n
0
1
0
0
0
1
1
1
0
0
1
1
n
n = 00 to 11 (Timer input pin (TIn) of 78K0R/IB3: n = 02 to 07 and 09)
Operates in Independent channel operation function or as slave channel in smultaneous channel operation
function.
Operates as master channel in simultaneous channel operation function.
STS
CIS
n1
n0
14
0
1
0
1
0
0
1
0
1
1
0
Falling edge
Rising edge
Both edges (when low-level width is measured)
Start trigger: Falling edge, Capture trigger: Rising edge
Both edges (when high-level width is measured)
Start trigger: Rising edge, Capture trigger: Falling edge
CCS
STS
Figure 6-7. Format of Timer Mode Register n (TMRn) (2/3)
n0
13
1n
0
1
0
0
0
1
Selection between using channel n independently or simultaneously with another channel
Only software trigger start is valid (other trigger sources are unselected).
Valid edge of TIn pin input is used as both the start trigger and capture trigger.
Both the edges of TIn pin input are used as a start trigger and a capture trigger.
Interrupt signal of the master channel is used (when the channel is used as a slave channel
with the simultaneous channel operation function).
The trigger of the dead time control trigger generation channel is used
The up and down control trigger of the master channel is used
Setting prohibited
CCS
12
0n
CHAPTER 6 TIMER ARRAY UNIT TAUS
MAST
ERn
11
User’s Manual U19678EJ1V1UD
STS
10
n2
Setting of start trigger or capture trigger of channel n
STS
n1
9
Selection of TIn pin input valid edge
(as a slave or master)
STS
n0
8
After reset: 0000H
CIS
n1
7
CIS
n0
6
5
0
R/W
MD
n4
4
Note
.
MD
n3
3
Note
.
MD
n2
2
MD
n1
1
MD
n0
0