UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 300

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UPD78F1201MC-CAB-AX

Manufacturer Part Number
UPD78F1201MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1201MC-CAB-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
298
Address: F01BEH, F01BFH
(12) Timer output mode register 0 (TOM0)
Symbol
TOM0
Note When the inverter control function is used, the slave channel output mode is selected by the timer
Caution Be sure to clear bits 15 to 12 to “0”.
Remark
TOM0 is used to control the timer output mode of each channel.
When a channel is used for the independent channel operation function, set the corresponding bit of the
channel to be used to 0.
When a channel is used for the simultaneous channel operation function, set the corresponding bit of the
master channel to 0 and the corresponding bit of the slave channel to 1.
The setting of each channel n specified by using this register is applied when timer output is enabled (TOEn =
1)
TOM0 can be rewritten when timer operation is stopped (TEn = 1).
TOM0 can be set by a 16-bit memory manipulation instruction.
Reset signal generation clears this register to 0000H.
Note The setting of each channel n when the inverter control function is used is applied when timer output is
Note
.
TOM
triangle wave output mode register0 (TOT0) setting. For details, refer to CHAPTER 7 INVERTER
CONTROL FUNCTIONS.
enabled (TOEn = 1) and TREn is set to 0 or TREn and TMEn are set to 1.
15
n
0
1
0
n: Channel number, m: Slave channel number
n = 00 to 11 (n = 00, 02, 04, 06, 08, 10 for master channel)
n < m ≤ 11 (For details of the relation between the master channel and slave channel, refer to
Master channel output mode (to produce toggle output by timer interrupt request signal (INTTMn))
Slave channel output mode (select output mode by the timer triangle wave output mode register (TOT0)
setting
14
0
Figure 6-21. Format of Timer Output Mode Register 0 (TOM0)
Note
After reset: 0000H
13
).
0
6.4 Basic Rules of Simultaneous Channel Operation Function.)
12
0
CHAPTER 6 TIMER ARRAY UNIT TAUS
TOM
11
11
User’s Manual U19678EJ1V1UD
TOM
R/W
10
10
Control of timer output mode of channel n
TOM
09
9
TOM
08
8
TOM
07
7
TOM
06
6
TOM
05
5
TOM
04
4
TOM
03
3
TOM
02
2
TOM
01
1
TOM
00
0

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