UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 358

• Manufacturer Part Number: UPD78F1201MC-CAB-AX
• Description: MCU 16BIT 78K0R/LX3 30-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1201MC-CAB-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

356
TMRn
TOM0
TOE0
TOL0
Remark
TO0
(a) Timer mode register n (TMRn)
(b) Timer output register 0 (TO0)
(c) Timer output enable register 0 (TOE0)
(d) Timer output level register 0 (TOL0)
(e) Timer output mode register 0 (TOM0)
TOEn
TOMn
CKSn
TOLn
Bit n
Bit n
Bit n
Bit n
TOn
1/0
15
0
0
0
0
n = 00, 02, 04, 06, 08, 10
Operation clock selection
14
0: Selects CK00 (channels 0 to 7) or CK02 (channels 8 to 11) as operation clock of channel n.
1: Selects CK01 (channels 0 to 7) or CK03 (channels 8 to 11) as operation clock of channel n.
0
CCS1n
0: Outputs 0 from TOn.
0: Stops the TOn output operation by counting operation.
0: Cleared to 0 when TOMn = 0 (master channel output mode).
0: Sets master channel output mode.
13
When Multiple PWM Output Function (Master Channel) Is Used
0
CCS0n
12
Figure 6-68. Example of Set Contents of Registers
0
Count clock selection
TERn
MAS
11
00B: Selects operation clock.
1
CHAPTER 6 TIMER ARRAY UNIT TAUS
Slave/master selection
STSn2
10
1: Master channel
0
User’s Manual U19678EJ1V1UD
STSn1
9
0
Start trigger selection
STSn0
000B: Selects only software start.
8
0
CISn1
0
7
CISn0
6
0
Selection of TIn pin input edge
00B: Sets 00B because these are not used.
Operation mode of channel n
0000B: Interval timer
0
5
Setting of operation when counting is started
1: Generates INTTMn when counting is
MDn4
started.
4
0
MDn3
3
0
MDn2
2
0
MDn1
1
0
MDn0
0
1