UPD78F1201MC-CAB-AX Renesas Electronics America, UPD78F1201MC-CAB-AX Datasheet - Page 364
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UPD78F1201MC-CAB-AX
Manufacturer Part Number
UPD78F1201MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1201MC-CAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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362
(6) 0% and 100% output can be performed.
(7) Forward and reverse settings of the timer output can be performed for each pin.
(8) Real-time output function (PWM modulation can be performed with this function)
(9) Forcible output stop function
0% and 100% outputs can be performed both with the complementary PWM output function and non-
complementary PWM output function.
The outputs of TO02 to TO07 can be set to high impedance during detection of the valid edge by the internal
comparator.
The outputs of TO02 to TO07 can be set to high impedance during detection of the valid edge by an external
pin input (TMOFF0, TMOFF1).
→ refer to 7.5.13 Operation as non-complementary modulation output function (type 1)
→ refer to 7.5.14 Operation as non-complementary modulation output function (type 2)
→ refer to 7.4.15 Operation as complementary modulation output function
→ refer to 7.6 Overvoltage Detection Function
Caution
Forcible output stop signal
Operating clock
(a selected clock)
Operating clock
(a selected clock)
(TMOFF0/CMP0P)
(TMOFF1/CMP1P)
There is no TMOFF1 pin in the 78K0R/IB3. Consequently, high impedance can only
be controlled by using the TMOFF0 pin.
(CMP0M)
(CMP1M
)
CHAPTER 7 INVERTER CONTROL FUNCTIONS
channel0 (master)
channel1 (slave)
channel2 (slave)
channel7 (slave)
channel0 (master)
channel2 (slave)
channel7 (slave)
Edge detection/
Selection
Compare
operation
Compare
operation
Compare
operation
Compare
operation
User’s Manual U19678EJ1V1UD
Interrupt signal
Trigger
(INTTM00)
(modulation)
controller
Output
CPU
Timer output
Timer output
(TO02)
(TO07)
Timer output
Timer output
(TO02)
(TO07)
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