UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 432

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Remark
432
ADA0
FR2
0
0
0
0
1
1
1
1
Other than above
ADA0
FR1
0
0
1
1
0
0
1
1
Table 13-3. Conversion Time Selection in High-Speed Conversion Mode (ADA0HS1 Bit = 1)
Conversion time:
Stabilization time:
Trigger response time: If a software trigger, external trigger, or timer trigger is generated after the
In the high-speed conversion mode, the conversion is started after the stabilization time elapsed from the
ADA0M0.ADA0CE bit is set to 1, and A/D conversion is performed only during the conversion time (2.6 to
10.4
conversion ends.
In continuous conversion mode, the stabilization time is inserted only before the first conversion, and not
inserted after the second conversion (the A/D converter remains running).
Note Setting prohibited when 2.7 V ≤ AV
Cautions 1. Set as 2.6
ADA0
FR0
μ
s). The A/D conversion end interrupt request signal (INTAD) is generated immediately after the
0
1
0
1
0
1
0
1
2. In the high-speed conversion mode, rewriting of the ADA0M0, ADA0M2, ADA0S,
26/f
52/f
78/f
104/f
130/f
156/f
182/f
208/f
Set as 3.9
ADA0PFM, and ADA0PFT registers and trigger input are prohibited during the
stabilization time.
XX
XX
XX
Conversion Time
XX
XX
XX
XX
XX
(+ Wait Time)
(+ 13/f
(+ 26/f
(+ 39/f
(+ 50/f
(+ 50/f
(+ 50/f
(+ 50/f
(+ 50/f
Actual A/D conversion time (2.6 to 10.4
A/D converter setup time (1
stabilization time, it is inserted before the conversion time.
XX
XX
XX
XX
XX
XX
XX
XX
)
)
)
μ
μ
)
)
)
)
)
s ≤ conversion time ≤ 10.4
s ≤ conversion time ≤ 10.4
Preliminary User’s Manual U18953EJ1V0UD
CHAPTER 13 A/D CONVERTER
(+ 1.3
(+ 1.95
(+ 2.5
(+ 2.5
(+ 2.5
(+ 2.5
Setting
prohibited
2.6
3.9
5.2
6.5
7.8
9.1
10.4
(+ 2.5
f
XX
= 20 MHz f
μ
μ
μ
μ
μ
μ
s
s
s
s
s
s
μ
Note
s
μ
μ
μ
μ
μ
μ
REF0
μ
s)
s)
s)
s)
s)
s)
s)
< 3.0 V
Setting
prohibited
3.25
(+ 1.625
4.875
(+ 2.438
6.5
(+ 3.125
8.125
(+ 3.125
9.75
(+ 3.125
Setting
prohibited
Setting
prohibited
XX
A/D Conversion Time
= 16 MHz f
μ
μ
Setting prohibited
μ
s
μ
s or longer)
s
μ
μ
s
Note
s
s
μ
μ
μ
μ
μ
μ
μ
s)
s)
s)
s)
s)
s when 2.7 V ≤ AV
s when 3.0 V ≤ AV
Setting
prohibited
4.333
(+ 2.167
6.5
(+ 3.25
8.667
(+ 4.167
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
XX
= 12 MHz f
μ
μ
s)
s
μ
μ
s
s
μ
μ
μ
s)
s)
s)
2.6
(+ 1.3
5.2
(+ 2.6
7.8
(+ 3.9
10.4
(+ 5
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
XX
= 10 MHz
REF0
REF0
μ
μ
μ
μ
s
s
s
μ
s)
s
μ
μ
μ
s)
s)
s)
≤ 3.6 V.
< 3.0 V.
6.5
(+ 0
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
f
XX
= 4 MHz
μ
μ
s
s)
3/f
3/f
3/f
3/f
3/f
3/f
3/f
3/f
Response
Trigger
XX
XX
XX
XX
XX
XX
XX
XX
Time