UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 820

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Power On/Power Off/Reset Timing
(T
Note
RESET pin, Interrupt, FLMD0 Pin Timing
(T
Notes 1. The characteristics of INTPn is the same as the DRST pin (P05/INTP2/DRST).
Remark T
820
EV
EV
V
RESET low-level width
RESET↓ → V
V
AV
RESET low-level width
NMI high-level width
NMI low-level width
INTPn
INTPn
FLMD0 high-level width
FLMD0 low-level width
A
A
DD
DD
DD
DD
REF0
= −40 to +85°C, V
= −40 to +85°C, V
↑ → RESET↑
↓ → EV
↑ → V
↑ → AV
Note 1
↓ → EV
Note 1
Depends on the on-chip regulator characteristics.
2. Flash memory programming mode only
Parameter
RESET (input)
high-level width
low-level width
DD
DD
SMP
REF0
↑
↓
DD
Parameter
DD
↓
: Noise elimination sampling clock cycle
, AV
↓
AV
EV
V
REF0
REF1
DD
DD
DD
Note 2
DD
Note 2
↑
= EV
= EV
<93>
<94>
t
t
t
WRSL
t
t
t
t
REL
REA
RER
FRE
FEA
FEL
Symbol
DD
DD
CHAPTER 30 ELECTRICAL SPECIFICATIONS (TARGET)
= AV
= AV
<93>
<94>
<95>
<96>
<97>
<98>
<99>
REF0
t
t
t
t
t
t
t
WRSL
WNIH
WNIL
WITH
WITL
WMDH
WMDL
REF0
Symbol
<95>
Analog noise elimination (during flash erase/writing)
Analog noise elimination
= AV
Preliminary User’s Manual U18953EJ1V0UD
= AV
REF1
REF1
Analog noise elimination
Analog noise elimination
n = 0 to 7 (Analog noise elimination)
n = 3 (Digital noise elimination)
n = 0 to 7 (Analog noise elimination)
n = 3 (Digital noise elimination)
V
I
= 2.2 to 3.6 V, V
= 2.2 to 3.6 V, V
V
Conditions
I
Conditions
<96>
SS
SS
= EV
= EV
V
SS
I
SS
= AV
= AV
SS
V
SS
I
= 0 V, C
= 0 V, C
3T
3T
<97>
500 + t
SMP
SMP
MIN.
500
500
500
500
500
500
500
L
MIN.
= 50 pF)
+ 20
+ 20
500
500
500
0
0
0
0
L
REG
= 50 pF)
Note
MAX.
<98>
<99>
MAX.
t
t
REL
FEL
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns