UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 612

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

612
The communication reservation flowchart is illustrated below.
(Communication reservation)
Note The communication reservation operation executes a write to the IICn register when a stop
Remark
condition interrupt request occurs.
n = 0 to 2
Yes
Figure 17-17. Communication Reservation Flowchart
Note
Cancel communication
reservation
Define communication
reservation
IICn register
MSTSn bit = 0?
SET1 STTn
Preliminary User’s Manual U18953EJ1V0UD
Wait
DI
EI
No
(Generate start condition)
CHAPTER 17 I
←
xxH
2
Sets STTn bit (communication reservation).
Defines that communication reservation is in effect
(defines and sets user flag to any part of RAM).
Secures wait period set by software (see Table 17-16).
Confirmation of communication reservation
Clears user flag.
IICn register write operation
C BUS