UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 732

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

23.3 Register
732
The clock monitor is controlled by the clock monitor mode register (CLM).
(1) Clock monitor mode register (CLM)
The CLM register is a special register. This can be written only in a special combination of sequences (see
3.4.7 Special registers).
This register is used to set the operation mode of the clock monitor.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Cautions 1. Once the CLME bit has been set to 1, it cannot be cleared to 0 by any means other than
CLM
After reset: 00H
2. When a reset by the clock monitor occurs, the CLME bit is cleared to 0 and the
reset.
RESF.CLMRF bit is set to 1.
CLME
7
0
0
1
Disable clock monitor operation.
Enable clock monitor operation.
R/W
6
0
Preliminary User’s Manual U18953EJ1V0UD
CHAPTER 23 CLOCK MONITOR
Address: FFFFF870H
5
0
Clock monitor operation enable or disable
4
0
3
0
2
0
1
0
CLME
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