UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 205

• Manufacturer Part Number: UPD70F3713GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3713GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
(1) Operation flow in one-shot pulse output mode
<1> Count operation start flow
<2> TPmCCR0, TPmCCR1 register setting change flow
Remark m = 0, 2, 3, k = 0, 2, a = 0, 1
External trigger input
INTTPmCC0 signal
INTTPmCC1 signal
TPmCCR0 register
TPmCCR1 register
(TPmCKS0 to TPmCKS2 bits)
Setting of TPmCCR0 and
(TIPk0 pin input)
TOPm1 output
Register initial setting
TPmCCR1 registers
TPmCCR0 register,
16-bit counter
TPmCTL1 register,
TPmCCR1 register
TPmIOC0 register,
TPkIOC2 register,
TPmCTL0 register
TPmCE bit = 1
TPmCE bit
Figure 6-30. Software Processing Flow in One-Shot Pulse Output Mode
START
FFFFH
0000H
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
<1>
As rewriting the
TPmCCRa register
immediately forwards
to the CCRa buffer
register, rewriting
immediately after
the generation of the
INTTPmCC0 signal
is recommended.
Initial setting of these
registers is performed
before setting the
TPmCE bit to 1.
D
The TPmCKS0 to
TPmCKS2 bits can be
set at the same time
when counting has been
started (TPmCE bit = 1).
Trigger wait status
D
D
10
00
10
User’s Manual U17716EJ2V0UD
D
00
<2>
<3> Count operation stop flow
D
D
D
11
01
11
D
01
TPmCE bit = 0
STOP
<3>
Count operation
is stopped
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