UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 248

• Manufacturer Part Number: UPD70F3713GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3713GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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246
(3) TMQn I/O control register 0 (TQnIOC0)
Cautions 1. If the setting of the TQnIOC0 register is changed when TOQnm, TOQH0b, and TOQ1Tb are
The TQnIOC0 register is an 8-bit register that controls the timer output (TOQ00, TOQ01/TOQH01, TOQ02,
TOQ03/TOQH02, TOQH03, and TOQ1T1 to TOQ1T3 pins).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Notes 1. Be sure to clear bits 2 to 7 of the TQ1IOC0 register to 0 when using TMQ1 as an interval
TQnIOC0
b = 1 to 3
n = 0, 1
set to the output mode, the output of the pins change. Set the port in the input mode and
make the port go into a high-impedance state, noting changes in the pin status.
2. The output level of the timer output pins (TOQnm, TOQH0b, and TOQ1Tb) specified by the
After reset: 00H
timer or a free-running timer.
In addition, set bits 2, 4, and 6 of the TQ1IOC0 register to 1, and bits 3, 5, and 7 to 0 or 1
when using the functions of TOQ1T1 to TOQ1T3 and TOQ1B1 to TOQ1B3 with TMQ1 as a
6-phase PWM output.
TQnOLm bit is shown below.
• When TQnOLm bit = 0
TQ0OL3
TOQ1Tb pin outputs
TQnOEm
TQnOLm
TOQnm, TOQH0b,
0
1
0
1
7
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
Note 1
16-bit counter
TQnCE bit
TQ0OE3
Timer output prohibited
• Low level is output from the TOQnm, TOQH0b, and TOQ1Tb pins
• High level is output from the TOQnm, TOQH0b, and TOQ1Tb pins
Timer output enabled (A pulse is output from the TOQnm, TOQH0b,
and TOQ1Tb pins.)
R/W
TOQnm, TOQH0b, and TOQ1Tb pins start output at high level.
TOQnm, TOQH0b, and TOQ1Tb pins start output at low level.
when the TQnOLm bit = 0.
when the TQnOLm bit = 1.
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Note 1
Output level setting of TOQnm, TOQH0b, TOQ1Tb pins
Address: TQ0IOC0 FFFFF5C2H, TQ1IOC0 FFFFF602H
TQ0OL2
User’s Manual U17716EJ2V0UD
Output setting of TOQnm, TOQH0b, TOQ1Tb pins
5
Note 1
(TMQ0: m = 0 to 3, TMQ1: m = 0)
(TMQ0: m = 0 to 3, TMQ1: m = 0)
TQ0OE2
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Note 1
• When TQnOLm bit = 1
TOQ1Tb pin outputs
TOQnm, TOQH0b,
TQ0OL1
16-bit counter
3
Note 1
TQnCE bit
TQ0OE1
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Note 1
TQnOL0 TQnOE0
1
Note 2
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