UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 470

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UPD70F3713GC-8BS-A

Manufacturer Part Number
UPD70F3713GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet

Specifications of UPD70F3713GC-8BS-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3713GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
11.9.4 Timer interrupt request signal in timer trigger mode
operation. When this happens, the timer interrupt request signal also functions as an interrupt for the CPU. In order
to prevent the generation of interrupts for the CPU, disable interrupts using the mask bits of the interrupt control
register.
11.9.5 Re-conversion start trigger input during stabilization time
input conflict, the stabilization time is inserted again.
11.9.6 Variation of A/D conversion results
by noise. To reduce the variation, take counteractive measures with the program, such as by averaging the A/D
conversion results.
11.9.7 A/D conversion result hysteresis characteristics
and then perform A/D conversion. After the A/D conversion has finished, the analog input voltage remains in the
internal sample & hold capacitor. As a result, the following phenomena may occur if the output impedance from the
analog input source is too high.
A/D conversion twice consecutively on the same channel, and discard the first conversion result.
468
The timer interrupt request signal (TQTADT1n) becomes an A/D conversion start trigger and starts the conversion
Remark
If the stabilization time end timing and the register writing conflict or the stabilization time end timing and the trigger
The results of the A/D conversion may vary depending on the fluctuation of the supply voltage, or may be affected
Successive comparison type A/D converters hold an analog input voltage in an internal sample & hold capacitor
• When the same channel is used for A/D conversions, if the voltage is higher or lower than the previous A/D
• When switching the analog input channel, hysteresis characteristics may appear where the conversion result is
To obtain more accurate conversion results, lower the output impedance from the analog input source or execute
conversion, then hysteresis characteristics may appear where the conversion result is affected by the previous
value. Even if the conversion were to be performed at the same potential, the results may thus vary.
affected by the previous channel value. This is because one A/D converter is used for the A/D conversions.
Even if the conversion were to be performed at the same potential, the results may thus vary.
n = 0, 1
CHAPTER 11 A/D CONVERTERS 0 AND 1
User’s Manual U17716EJ2V0UD

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