UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 622

• Manufacturer Part Number: UPD70F3713GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3713GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

18.4.4 Selection of communication mode
after switching to the flash memory programming mode. The FLMD0 pulse is generated by the dedicated flash
memory programmer.
620
In the V850ES/IE2, the communication mode is selected by inputting pulses (11 pulses max.) to the FLMD0 pin
The following shows the relationship between the number of pulses and the communication mode.
Note The number of clocks is as follows depending on the communication mode.
Caution
0
8
11
Other
TXDA0 (output)
FLMD0 Pulse
RESET (input)
RXDA0 (input)
FLMD1 (input)
FLMD0 (input)
When UARTA0 is selected, the receive clock is calculated based on the reset command sent
from the dedicated flash memory programmer after receiving the FLMD0 pulse.
V
DD
UARTA0
CSIB0
CSIB0 + HS
RFU
V
V
V
V
V
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
SS
SS
SS
SS
SS
SS
Communication Mode
Power on
Figure18-8. Selection of Communication Mode
released
CHAPTER 18 FLASH MEMORY
Reset
User’s Manual U17716EJ2V0UD
Oscillation
stabilized
Communication rate: 9,600 bps (after reset), LSB first
V850ES/IE2 performs slave operation, MSB first
V850ES/IE2 performs slave operation, MSB first
Setting prohibited
Communication
mode selected
(Note)
Flash control command communication
Remarks
(erasure, write, etc.)