UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 544

• Manufacturer Part Number: UPD70F3713GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3713GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

542
Notes 1. The INTCB0T interrupt is set when the data written to the CB0TX register is transferred to the data
Caution In single transfer mode, writing to the CB0TX register with the CB0TSF bit set to 1 is ignored.
2. The INTCB0R interrupt occurs if reception is correctly ended and receive data is ready in the
SIB0 pin
capture
SCKB0 pin
Reg-R/W
SCKB0 pin
SIB0 pin
capture
SOB0 pin
Reg-R/W
INTCB0T
interrupt
SOB0 pin
INTCB0R
interrupt
CB0TSF bit
INTCB0T
interrupt
INTCB0R
interrupt
CB0TSF bit
shift register in the continuous transmission or continuous transmission/reception mode. In the
single transmission or single transmission/reception mode, the INTCB0T interrupt request signal is
not generated, but the INTCB0R interrupt request signal is generated upon end of communication.
CB0RX register while reception is enabled. In the single mode, the INTCB0R interrupt request
signal is generated even in the transmission mode, upon end of communication.
This has no influence on the operation during transfer.
Use the continuous transfer mode, not the single transfer mode.
Note 1
Note 2
Note 1
Note 2
(iii) Communication type 2 (CB0CKP and CB0DAP bits = 01)
(iv) Communication type 4 (CB0CKP and CB0DAP bits = 11)
CHAPTER 13 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIB)
D7
D7
User’s Manual U17716EJ2V0UD
D6
D6
D5
D5
D4
D4
D3
D3
D2
D2
D1
D1
D0
D0
(2/2)