UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 603

• Manufacturer Part Number: UPD70F3713GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3713GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(b) To use for interrupt
Internal reset signal
When the operation of LVI is enabled, the supply voltage and detection voltage are compared.
supply voltage is lower than the detection voltage, an interrupt request signal (INTLVI) is generated (when
the LVIM.LVIMD bit is cleared to 0).
The following shows the operation setting method and timing chart.
<To start operation>
<1> Mask the interrupt of LVI.
<2> Select the voltage to be detected by using the LVIS.LVIS0 bit.
<3> Set the LVIM.LVION bit to 1 (to enable operation).
<4> Insert a wait cycle of 0.1 ms (TYP) (target value) or more by software.
<5> By using the LVIM.LVIF bit, check if the supply voltage > detection voltage.
<6> Clear the interrupt request flag of LVI.
<7> Unmask the interrupt of LVI.
<To stop operation>
Clear the LVION bit to 0.
Supply voltage
POC detection
request signal
INTLVI signal
LVI detection
LVI detection
(active low)
POC reset
LVION bit
LVIF bit
voltage
voltage
signal
(V
Figure 16-6. Operation Timing of Low-Voltage Detector (LVIMD Bit = 0)
DD
)
Delay
Delay
Set (by instruction, refer to <3> above.)
CHAPTER 16 RESET FUNCTIONS
User’s Manual U17716EJ2V0UD
Delay
Delay
Delay
Delay
Clear
(by POC reset request signal)
Delay
Delay
Time
If the
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