UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 283

• Manufacturer Part Number: UPD70F3713GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3713GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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7.6.2
TQ0CTL0.TQ0CE bit is set to 1, and an interrupt request signal (INTTQ0CC0) is generated each time the specified
number of edges set by the TQ0CCR0 register have been counted. The TOQ00 to TOQ03 pins cannot be used.
When using the TOQ00 to TOQ03 pins in the external event count input mode, set the TQ0CTL1.TQ0EEE bit to 1 in
the interval timer mode (see 7.6.1 (3) Operation by external event count input (EVTQ0)).
This mode is valid only in TMQ0.
In the external event count mode, the valid edge of the external event count input (EVTQ0) is counted when the
The TQ0CCR1 to TQ0CCR3 registers are not used in the external event count mode.
Caution In the external event count mode, the TQ0CCR0 to TQ0CCR3 registers must not be cleared to
EVTQ0 pin
(external event
count input)
External event count mode (TQ0MD2 to TQ0MD0 bits = 001)
0000H.
Edge
detector
Figure 7-15. Configuration in External Event Count Mode
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
TQ0CE bit
User’s Manual U17716EJ2V0UD
CCR0 buffer register
TQ0CCR0 register
16-bit counter
Clear
Match signal
INTTQ0CC0 signal
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