UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 332

• Manufacturer Part Number: UPD70F3713GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3713GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

330
TQ0IOC2
TQnOPT0
(e) TMQ0 I/O control register 2 (TQ0IOC2)
(f) TMQn option register 0 (TQnOPT0)
(g) TMQn counter read buffer register (TQnCNT)
(h) TMQn capture/compare registers 0 to 3 (TQnCCR0 to TQnCCR3)
The value of the 16-bit counter can be read by reading the TQnCNT register.
These registers function as capture registers or compare registers depending on the setting of the
TQ0OPT0.TQ0CCSa bit.
When the registers function as capture registers, they store the count value of the 16-bit counter when
the valid edge input to the TIQ0a pin is detected.
When the registers function as compare registers and when D
INTTQnCCa signal is generated when the counter reaches (D
TOQ00 to TOQ03 and TOQ10 pins are inverted.
Remark
TQ0CCS3
0/1
0
TQ0CCS2
a = 0 to 3
Figure 7-37. Register Setting in Free-Running Timer Mode (3/3)
0/1
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
TQ0CCS1
0/1
0
TQ0CCS0
0/1
0
User’s Manual U17716EJ2V0UD
TQ0EES1
0/1
0
TQ0EES0
TQ1CMS TQ1CUF TQnOVF
0/1
0
0
0
a
a
is set to the TQnCCRa register, the
+ 1), and the output signals of the
0/1
0
Select valid edge of external
event count input (EVTQ0 pin)
Overflow flag
Specifies if TQ0CCR0
register functions as
capture or compare register
0: Compare register
1: Capture register
Specifies if TQ0CCR1
register functions as
capture or compare register
0: Compare register
1: Capture register
Specifies if TQ0CCR2
register functions as
capture or compare register
0: Compare register
1: Capture register
Specifies if TQ0CCR3
register functions as
capture or compare register
0: Compare register
1: Capture register