UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 402

• Manufacturer Part Number: UPD70F3713GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3713GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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<1> Matching of the count value of the 16-bit counter and the value of the TQ1CCRm register as a result of
<2> Even if the PWM output does not change, the interrupt generated upon a match between the 16-bit
<3> The next match between the 16-bit counter and TQ1CCRm register is valid after the counter has changed
If the TQ1CCRm register is rewritten after its value matches the value of the 16-bit counter, the next match is
ignored after the first match occurs and the rewritten value is not reflected to the TOQ1Tm pin output. If the
register is rewritten while the counter is counting down, the match that occurs after the counter starts counting
down is valid (the match that occurs after the counter has started counting up is valid if the register is rewritten
while the counter is counting up).
Remarks 1. i, r, k = Set value of TQ1CCRm register
Figure 9-25. Example of Rewriting TQ1CCR1 to TQ1CCR3 Registers (Rewriting After Match Occurs)
(c) Rewriting TQ1OPT1 register
rewriting the register is ignored after a match signal has been generated, and the PWM output does not
change.
counter value and the TQ1CCRm register value (INTTQ1CCm) is output.
its counting direction to up or down, and the PWM output changes.
The interrupt culling counter is cleared when the TQ1OPT1 register is written. When the interrupt culling
counter has been cleared, the measured number of times the interrupt has occurred is discarded.
Consequently, the interrupt generation interval is temporarily extended.
To avoid this operation, rewrite the TQ1OPT1 register in the intermittent batch rewrite mode (transfer
culling mode).
For details of rewriting the TQ1OPT1 register, see 9.4.3 Interrupt culling function.
2. m = 1 to 3
CCRm buffer
INTTQ1CCm
TQ1CCRm
pin output
TOQ1Tm
counter
register
register
signal
16-bit
CHAPTER 9 MOTOR CONTROL FUNCTION
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User’s Manual U17716EJ2V0UD
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