UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 1094

• Manufacturer Part Number: UPD70F3763GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-U 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Ur

Specifications of UPD70F3763GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(4) PCI control register 2 (PCI_CONTROL2)
8
6-4
2-0
Bit position
After reset: 0000 0077H
PCI_CONTROL2
wbuf_busy
wburst_size
[2:0]
rburst_size
[2:0]
Bit name
PCI Write Buffer Busy
Indicates the status of data in the write buffer when writing to a PCI target (SDRAM).
This bit is read-only.
PCI Write Burst Max Size
Sets the maximum burst length for writing to a PCI target (SDRAM).
Use this field with the initial setting.
PCI Read Burst Max Size
Sets the maximum burst length for reading from a PCI target (SDRAM).
Use this field with the initial setting.
0: Data to be written to SDRAM/SRAM does not remain in the write buffer.
1: Data to be written to SDRAM/SRAM remains in the write buffer.
31
15
23
0
0
0
7
0
R/W
2
0
0
0
0
1
1
1
1
2
0
0
0
0
1
1
1
1
wburst_
size2
Address: 002E100CH
wburst_size
rburst_size
30
22
14
0
0
0
6
1
0
0
1
1
0
0
1
1
1
0
0
1
1
0
0
1
1
wburst_
size1
29
21
13
0
0
0
5
0
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
wburst_
size0
28
12
20
Supports single transfer only.
2 bursts
3 bursts
4 bursts
5 bursts
6 bursts
7 bursts
8 bursts (initial value)
Supports single transfer only.
2 bursts
3 bursts
4 bursts
5 bursts
6 bursts
7 bursts
8 bursts (initial value)
4
0
0
0
CHAPTER 21 USB HOST CONTROLLER (USBH)
Maximum Burst Length for Writing to
Maximum Burst Length for Reading
Function
19
11
27
0
0
0
3
0
from PCI Target
PCI Target
rburst_
size2
26
18
10
0
0
0
2
rburst_
size1
25
17
0
0
9
0
1
wbuf_busy
rburst_
size0
24
16
0
0
8
0
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