UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 1132

• Manufacturer Part Number: UPD70F3763GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-U 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Ur

Specifications of UPD70F3763GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(14) HcFmInterval register (Offset 34H)
31
30 to 16
15, 14
13 to 0
Bit position
After reset: 0000 2EDFH
FIT
FSMPS
[14:0]
FI[13:0]
Bit name
−
Frame Interval Toggle
Used to synchronize the frame setting values of the host controller driver (HCD) and OHCI
host controller.
Toggle the setting of this bit when writing to the FI field via the HCD.
The OHCI host controller reflects the FIT value to the FRT bit of the HcFmRemaining
register when loading the FI field.
The HCD can check whether the new FI field value is reflected, by comparing the FIT bit
value that was set upon writing to the FI field and the FRT bit value that was read.
FS Largest Data Packet
Sets the maximum data amount that can be transmitted or received without causing a
schedule overrun. The current frame position and the set value are compared, and judged
up to which position of a frame can be transferred. The result varies depending on the
system bus performance, so this value is set by the host controller driver (HCD).
Reserved (Be sure to write “0” to these bits.)
Frame Interval
Sets the bit time for the interval of two successive SOFs in Full-Speed mode.
This field must be set to 2EDFH so as to satisfy the length of one frame (= 1 ms)
prescribed by the USB Specification.
FSMPS7
FIT
FI7
31
15
23
0
7
R/W
FSMPS14
FSMPS6
FI6
30
22
14
0
6
FSMPS13
FSMPS5
FI13
FI5
29
21
13
5
FSMPS12
FSMPS4
FI12
FI4
28
12
20
4
CHAPTER 21 USB HOST CONTROLLER (USBH)
Function
FSMPS11
FSMPS3
FI11
FI3
27
19
11
3
FSMPS10
FSMPS2
FI10
FI2
26
18
10
2
FSMPS9
FSMPS1
FI9
FI1
25
17
9
1
FSMPS8
FSMPS0
FI8
FI0
24
16
8
0
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