UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 1102

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UPD70F3763GC-UEU-AX

Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet

Specifications of UPD70F3763GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-U, V850ES/JH3-U
21.7 OHCI Host Controller
21.7.1 OHCI host controller functions
channel consists of OHCI operational registers, and the OHCI host controller serves as a target (slave) for this
communication. The Base Address register (10H) in the OHCI host configuration registers functions as a pointer to the
OHCI operational registers.
registers, which functions as a pointer to the shared memory. The OHCI host controller serves as a master for this
communication.
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
The OHCI host controller has the following functions.
• Conforms to OpenHCI Specification Release 1.0a
• Conforms to Universal Serial Bus Specification Revision 1.1
• Incorporates 1 channel root hub and supports one downstream port
• USB clock: 48 MHz, PCI clock: 25 to 33 MHz
• Memory space
• Communication with CPU
Two communication channels are connected between the CPU and the OHCI host controller. The communication
The second communication channel is the host controller communication area (HCCA) in the OHCI operational
Descriptor information used for communication is managed by the OHCI operational registers and the HCCA area.
Supports transfer at full-speed (12 Mbps)
4 KB PCI memory area (OHCI operational registers) allocated
256-byte host controller communication area (HCCA) allocated
Performs communication via operational registers in the OHCI host controller and the host controller communication
area (HCCA).
CHAPTER 21 USB HOST CONTROLLER (USBH)
Page 1102 of 1408

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