UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 1114

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UPD70F3763GC-UEU-AX

Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet

Specifications of UPD70F3763GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(10) Power Management Control/Status, PMCSR Bridge Support Extensions, Data (Offset 44H)
31 to 24
23
22
15
14, 13
12 to 9
8
Bit position
After reset: 0000 0000H
Data[7:0]
BPCC
Enable
B2_B3
PME Status
Data Scale
[1:0]
Data Select
[3:0]
PME Enable Bit for setting whether to use external pin PME (Power Management Control/Status).
Bit name
This is an optional field in the PCI Specification, and is not supported by the USB host
controller (Data).
This field is fixed to “00”.
These bits are read-only.
Bit for Bridge, which is not supported by the USB host controller (PMCSR Bridge Support
Extensions).
This field is fixed to “0”.
This bit is read-only.
Bit for Bridge, which is not supported by the USB host controller (PMCSR Bridge Support
Extensions).
This field is fixed to “0”.
This bit is read-only.
Indicates the PME interrupt status (Power Management Control/Status).
This bit is set to “1” when conditions for asserting PME are satisfied.
This bit is cleared to “0” when “1” is written via the PCI bus.
This field is optional in the PCI Specification, and is not supported by the host controller
(Power Management Control/Status).
This field is fixed to “00”.
These bits are read-only.
This field is optional in the PCI Specification, and is not supported by the host controller
(Power Management Control/Status).
This field is fixed to “0000”.
These bits are read-only.
If this bit is set to 1B, a PME interrupt occurs when returning from Power Management
mode.
Enable
BPCC
Status
Data7
PME
31
15
23
7
0
R/W
B2_B3
Scale1
Data6
Data
30
22
14
6
0
Scale0
Data5
Data
29
21
13
0
5
0
Select3
Data4
Data
28
12
20
0
4
0
CHAPTER 21 USB HOST CONTROLLER (USBH)
Function
Select2
Data3
Data
27
19
11
3
0
0
Select1
Data2
Data
26
18
10
0
2
0
Select0
Power
State1
Data1
Data
25
17
9
1
0
Enable
State0
Power
Data0
PME
24
16
0
8
0
Page 1114 of 1408

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