UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 890

• Manufacturer Part Number: UPD70F3763GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-U 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Ur

Specifications of UPD70F3763GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
Notes 1.
Remark
2.
WRELn
INTIICn
WRELn
INTIICn
ACKDn
ACKEn
MSTSn
ACKDn
ACKEn
MSTSn
Processing by master device
WTIMn
SDA0n
WTIMn
Transfer lines
SCL0n
Processing by slave device
SPDn
TRCn
SPDn
TRCn
n = 0 to 2
STDn
SPTn
STDn
SPTn
To cancel the master wait state, write FFH to IICn or set WRELn.
Cancel the wait during a slave transmission by writing to IICn, not by setting WRELn.
STTn
STTn
IICn
IICn
(When 8-Clock Wait for Master and 9-Clock Wait for Slave Are Selected) (1/3)
H
H
H
L
L
L
L
L
L
IICn
Figure 19-24. Example of Slave to Master Communication
AD6 AD5 AD4 AD3 AD2 AD1 AD0
1
←
address
2
Receive
Transmit
3
(a) Start condition ~ address
4
5
6
7
R
8
ACK
9
IIC
IICn
←
D7
Receive
1
Note 1
data Note 2
←
Transmit
FFH Note 1
D6
2
D5
3
CHAPTER 19 I
D4
4
D3
5
Page 890 of 1408
D2
6
2
C BUS