UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 1096

• Manufacturer Part Number: UPD70F3763GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-U 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Ur

Specifications of UPD70F3763GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(6) PCI interrupt status register (PCI_INT_STATUS)
11
10
8
3
Bit position
This register can be used to identify the source of the INTUSBH0 and INTUSBH1 signals that are output from the
PCI host bridge.
The sources of interrupts inta, int_smmi and int_pme are cleared by the unit which issued the interrupts.
The sources of interrupts serr, perr, mabort and tabort are used during debugging only, and are not used in other
operations.
See 6.7.5 PCI_INT_CTL register for how to enable interrupt sources.
PCI_INT_STATUS
After reset: 0000 0000H
int_pme
Int_smmi
inta
serr
Bit name
PCI Interrupt PME Status
The source of this interrupt is cleared (0) by the source which issued PME.
This bit is read-only.
PCI Interrupt SMMI Status
The source of this interrupt is cleared (0) by the source which issued SMMI.
This bit is read-only.
PCI Interrupt INTA Status
The source of this interrupt is cleared (0) by the source which issued INTA.
This bit is read-only.
PCI Host Bridge System Error Interrupt Status
The source of this interrupt is cleared (0) by writing “1” to this bit.
The System Error interrupt is issued during debugging and is not used during normal
operation.
0: No interrupt sources
1: An interrupt by PME occurred.
0: No interrupt sources
1: An interrupt by SMMI occurred.
0: No interrupt sources
1: An interrupt by INTA occurred.
0: No interrupt sources
1: A system error was detected.
31
15
23
0
0
0
7
0
R/W
Address: 002E1018H
30
22
14
0
0
0
6
0
29
21
13
5
0
0
0
0
28
12
20
0
0
0
4
0
CHAPTER 21 USB HOST CONTROLLER (USBH)
Function
Int_pme
serr
27
19
11
0
0
3
Int_smmi
perr
26
18
10
0
0
2
mabort
25
17
0
0
9
0
1
tabort
24
16
0
0
8
Inta
0
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