UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 1126

• Manufacturer Part Number: UPD70F3763GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-U 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Ur

Specifications of UPD70F3763GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(6) HcInterruptDisable register (Offset 14H)
31
30
29 to 7
6
5
Bit position
After reset: 0000 0000H
MID
OCD
RHSCD
FNOD
Bit name
−
Master Interrupt Disable
Sets whether to disable interrupt sources set by bits 30 and 6 to 0 of the HcInterruptEnable
register.
When this bit is read, the value of the corresponding bit of the HcInterruptEnable register is
read.
To set this bit to “1”, write “1” to the corresponding bit of the HcInterruptEnable register.
Ownership Change Disable
Sets whether to remove OC from the interrupt sources.
When this bit is read, the value of the corresponding bit of the HcInterruptEnable register is
read. Writing “1” to this bit clears OC from the interrupt sources.
To set this bit to “1”, write “1” to the corresponding bit of the HcInterruptEnable register.
Reserved. (Be sure to write “0” to these bits.)
Root Hub Status Change Disable
Sets whether to remove RHSC from the interrupt sources.
When this bit is read, the value of the corresponding bit of the HcInterruptEnable register is
read. Writing “1” to this bit clears RHSC from the interrupt sources.
To set this bit to “1”, write “1” to the corresponding bit of the HcInterruptEnable register.
Frame Number Overflow Disable
Sets whether to remove FNO from the interrupt sources.
When this bit is read, the value of the corresponding bit of the HcInterruptEnable register is
read. Writing “1” to this bit clears FNO from the interrupt sources.
To set this bit to “1”, write “1” to the corresponding bit of the HcInterruptEnable register.
1: Disables all the specified interrupt sources.
0: Ignored
1: Disables OC as an interrupt source.
0: Ignored
1: Disables RHSC as an interrupt source.
0: Ignored
1: Disables FNO as an interrupt source.
0: Ignored
MID
31
15
23
0
0
7
0
R/W
RHSCD
OCD
30
22
14
0
0
6
FNOD
29
21
13
5
0
0
0
UED
28
12
20
0
0
0
4
CHAPTER 21 USB HOST CONTROLLER (USBH)
Function
RDD
27
19
11
0
0
0
3
SFD
26
18
10
0
0
0
2
WDHD
25
17
0
0
9
0
1
SOD
24
16
0
0
8
0
0
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