UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 1138

• Manufacturer Part Number: UPD70F3763GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-U 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Ur

Specifications of UPD70F3763GC-UEU-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 75
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(21) HcRhStatus register (Offset 50H)
31
30 to 18
17
16
Bit position R/W
After reset: 0000 0000H
(a) When read
(b) When written
R
W
−
−
−
CRWE
OCIC
LPSC
SGP
Bit name
−
CRWE
DRWE
CRWE
SRWE
31
15
31
15
23
23
0
7
0
0
7
0
R/W
Clear Remote Wakeup Enable
Clears the DRWE bit to “0”.
Writing “1” to this bit clears the DRWE bit to 0. Writing “0” to this bit is ignored.
Value “0” is always read from this bit.
This bit is write-only.
Reserved. (Be sure to write “0” to these bits.)
Overcurrent Indicate Change
Reports the change in the OCI bit. This bit is set (1) when the OCI bit setting
changes. This bit is cleared (0) when “1” is written while being set (1).
Local Power Status Change
This bit is fixed to “0” because the local power status is not supported.
Set Global Power
Used to turn on power to all ports in global power mode. Setting this bit to “1” turns
power on to all ports.
When the PSM bit of the HcRhDescriptorA register is set to “1”, power is turned on to
ports with which the PPCM field is cleared (0).
1: The overcurrent state has changed.
0: The overcurrent state has not changed.
30
22
14
30
22
14
0
0
0
6
0
0
0
0
6
0
29
21
13
29
21
13
0
0
0
5
0
0
0
0
5
0
28
12
28
12
20
20
0
0
0
4
0
0
0
0
4
0
CHAPTER 21 USB HOST CONTROLLER (USBH)
Function
27
19
11
27
19
11
0
0
0
3
0
0
0
0
3
0
26
18
10
26
18
10
0
0
0
2
0
0
0
0
2
0
OCIC
OCIC
OCI
OCI
25
17
25
17
9
1
9
1
0
0
0
0
LPSC
CGP
SGP
LPS
24
16
24
16
0
8
0
0
0
8
0
0
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