M30260F6AGP#D5 Renesas Electronics America, M30260F6AGP#D5 Datasheet - Page 109

• Manufacturer Part Number: M30260F6AGP#D5
• Description: IC M16C MCU FLASH 48K 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F6AGP#D5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

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11.3 DMA Enable
11.4 DMA Request
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Table 11.4.1 Timing at Which the DMAS Bit Changes State
2
Software trigger
Peripheral function
When a data transfer starts after setting the DMAE bit in DMiCON register (i = 0, 1) to “1” (enabled), the
DMAC operates as follows:
(1) Reload the forward address pointer with the SARi register value when the DSD bit in the DMiCON
register is “1” (forward) or the DARi register value when the DAD bit in the DMiCON register is “1” (forward).
(2) Reload the DMAi transfer counter with the DMAi transfer counter reload register value.
If the DMAE bit is set to “1” again while it remains set, the DMAC performs the above operation. However,
if a DMA request may occur simultaneously when the DMAE bit is being written, follow the steps below.
Step 1: Write “1” to the DMAE bit and DMAS bit in DMiCON register simultaneously.
Step 2: Make sure that the DMAi is in an initial state as described above (1) and (2) in a program.
If the DMAi is not in an initial state, the above steps should be repeated.
The DMAC can generate a DMA request as triggered by the cause of request that is selected with the DMS
and DSEL3 to DSEL0 bits in the DMiSL register (i = 0, 1) on either channel. Table 11.4.1 shows the timing
at which the DMAS bit changes state.
Whenever a DMA request is generated, the DMAS bit is set to “1” (DMA requested) regardless of whether
or not the DMAE bit is set. If the DMAE bit was set to “1” (enabled) when this occurred, the DMAS bit is set
to “0” (DMA not requested) immediately before a data transfer starts. This bit cannot be set to “1” in a
program (it can only be set to “0”).
The DMAS bit may be set to “1” when the DMS or the DSEL3 to DSEL0 bits change state. Therefore,
always be sure to set the DMAS bit to “0” after changing the DMS or the DSEL3 to DSEL0 bits.
Because if the DMAE bit is “1”, a data transfer starts immediately after a DMA request is generated, the
DMAS bit in almost all cases is “0” when read in a program. Read the DMAE bit to determine whether the
DMAC is enabled.
DMA factor
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2 /
When the interrupt control register
for the peripheral function that is
selected by the DSEL3 to DSEL0
and DMS bits in the DMiSL register
has its IR bit set to “1”
6
When the DSR bit in the DMiSL
register is set to “1”
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Timing at which the bit is set to “1”
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DMAS bit in the DMiCON register
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• Immediately before a data transfer starts
• When set by writing “0” in a program
Timing at which the bit is set to “0”
11. DMAC