M30260F6AGP#D5 Renesas Electronics America, M30260F6AGP#D5 Datasheet - Page 148

IC M16C MCU FLASH 48K 48-LQFP

M30260F6AGP#D5

Manufacturer Part Number
M30260F6AGP#D5
Description
IC M16C MCU FLASH 48K 48-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheet

Specifications of M30260F6AGP#D5

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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R
R
M
e
E
1
. v
J
6
Figure 12.3.1.2.1. PDRF Register
0
C
2
9
0 .
B
2 /
0
0
12.3.1.2 Position-data-retain Function Control Register
12.3.1.2.1 W-phase Position Data Retain Bit (PDRW)
12.3.1.2.2 V-phase Position Data Retain Bit (PDRV)
12.3.1.2.3 U-phase Position Data Retain Bit (PDRU)
12.3.1.2.4 Retain-trigger Polarity Select Bit (PDRT)
6
2
A
0
Figure 12.3.1.2.1 shows the structure of the position-data-retain function contol register.
F
2
Position-data-retain function control register
This bit is used to retain the input level at pin IDW.
This bit is used to retain the input level at pin IDV.
This bit is used to retain the input level at pin IDU.
This bit is used to select the trigger polarity to retain the position data.
When this bit is set to "0", the rising edge of each positive phase selected.
When this bit is set to "1", the falling edge of each pocitive phase selected.
e
G
b7
0 -
NOTE:
b
o r
1 .
2
1. This register is valid only in the three-phase mode.
0
, 5
u
0
p
2
(
0
M
0
7
1
6
b3
C
page 129
2 /
b2
6
, A
b1
M
b0
1
f o
6
Bit symbol
C
(b7-b4)
3
PDRW
PDRU
PDRV
PDRT
2
2 /
Symbol
PDRF
9
6
, B
M
1
W-phase position
data retain bit
V-phase position
data retain bit
U-phase position
data retain bit
Retain-trigger
polarity select bit
Nothing is assigned. When write, set to "0". When read,
contents are indeterminate.
6
C
Bit name
2 /
6
) T
Address
034E
16
Input level at pin IDW is read out.
0: "L" level
1: "H" level
Input level at pin IDV is read out.
0: "L" level
1: "H" level
Input level at pin IDU is read out.
0: "L" level
1: "H" level
0: Rising edge of positive phase
1: Falling edge of positive phase
(1)
Function
When reset
XXXX 0000
2
RW
RW
RO
RO
RO
12. Timer

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