M30260F6AGP#D5 Renesas Electronics America, M30260F6AGP#D5 Datasheet - Page 189

• Manufacturer Part Number: M30260F6AGP#D5
• Description: IC M16C MCU FLASH 48K 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F6AGP#D5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

R
R
M
e
E
1
. v
Table 13.1.4.2. Registers to Be Used and Settings in Special Mode 2
J
NOTE:
6
0
Register
U2TB
U2RB
U2BRG
U2MR
U2C0
U2C1
U2SMR
U2SMR2
U2SMR3
U2SMR4
2
C
9
0 .
B
2 /
1. Not all bits in the register are described above. Set those bits to “0” when writing to the registers in
0
0
6
2
(1)
(1)
A
0
(1)
F
Special Mode 2.
2
e
G
0 -
b
o r
1 .
2
0
, 5
u
0 to 7
0 to 7
OER
0 to 7
SMD2 to SMD0
CKDIR
IOPOL
CLK1, CLK0
CRS
TXEPT
CRD
NCH
CKPOL
UFORM
TE
TI
RE
RI
U2IRS
U2RRM,
U2LCH, U2ERE
0 to 7
0 to 7
CKPH
NODC
0, 2, 4 to 7
0 to 7
0
p
2
0
(
M
0
Bit
7
1
6
C
page 170
2 /
6
, A
M
1
f o
6
Set transmission data
Reception data can be read
Overrun error flag
Set a transfer rate
Set to ‘001
Set this bit to “0” for master mode or “1” for slave mode
Set to “0”
Select the count source for the U2BRG register
Invalid because CRD = 1
Transmit register empty flag
Set to “1”
Select TxD2 pin output format
Clock phases can be set in combination with the CKPH bit in the U2SMR3
register
Set to “0”
Set this bit to “1” to enable transmission
Transmit buffer empty flag
Set this bit to “1” to enable reception
Reception complete flag
Select UART2 transmit interrupt cause
Set to “0”
Set to “0”
Set to “0”
Set to “0”
Set to “0”
Set to “0”
Clock phases can be set in combination with the CKPOL bit in the U2C0 register
C
3
2
2 /
9
6
, B
M
2
1
’
6
C
2 /
6
) T
Function
13. Serial I/O