M30260F6AGP#D5 Renesas Electronics America, M30260F6AGP#D5 Datasheet - Page 68

• Manufacturer Part Number: M30260F6AGP#D5
• Description: IC M16C MCU FLASH 48K 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F6AGP#D5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

R
R
M
e
E
7.5 CPU Clock and Peripheral Function Clock
. v
J
1
Table 7.5.3.1 The function of the CLK
0
6
The CPU clock is used to operate the CPU and peripheral function clocks are used to operate the periph-
eral functions.
7.5.1 CPU Clock
7.5.2 Peripheral Function Clock (f
7.5.3 ClockOutput Function
2
9
C
0 .
B
PC
This is the operating clock for the CPU and watchdog timer.
The clock source for the CPU clock can be chosen to be the main clock, sub clock, on-chip oscillator clock
or the PLL clock.
If the main clock or on-chip oscillator clock is selected as the clock source for the CPU clock, the selected
clock source can be divided by 1 (undivided), 2, 4, 8 or 16 to produce the CPU clock. Use the CM06 bit in
CM0 register and the CM17 to CM16 bits in CM1 register to select the divide-by-n value.
When the PLL clock is selected as the clock source for the CPU clock, the CM06 bit should be set to “0”
and the CM17 and CM16 bits to “00
After reset, the on-chip oscillator clock divided by 16 provides the CPU clock.
Note that when entering stop mode from high or middle speed mode, on-chip oscillator mode or on-chip
oscillator low power dissipation mode, or when the CM05 bit in the CM0 register is set to “1” (main clock
turned off) in low-speed mode, the CM06 bit in the CM0 register is set to “1” (divide-by-8 mode).
These are operating clocks for the peripheral functions.
Of these, fi (i = 1, 2, 8, 32) and fi
divided by i. The clock fi is used for Timer A and Timer B while fi
Additionally, the f1 and f2 clocks are also used for dead time timer.
The f
D converter.
When the WAIT instruction is executed after setting the CM02 bit in the CM0 register to “1” (peripheral
function clock turned off during wait mode), or when the microcomputer is in low power dissipation mode,
the fi, fi
The f
when the sub clock is on.
The f
CM01 to CM00 bits in the CM0 register to select. Table 7.5.3.1 shows the function of the CLK
2 /
0
0
2
6
0
0
0
0
1
1
1
1
LK5
0
F
A
2
e
1
AD
C32
0 -
b
G
, f
1 .
2
SIO
o r
8
clock is produced from the main clock, PLL clock or on-chip oscillator clock, and is used for the A/
0
, 5
, f
clock is produced from the sub clock, and is used for timers A and B. This clock can only be used
0
u
32
2
p
and f
0
(
or f
0
CM01
M
7
1
0
0
1
1
0
0
1
1
AD
C
6
C
clock can be output from the CLK
page 49
clocks are turned off.
2 /
6
, A
M
CM00
f o
1
0
1
0
1
0
1
0
1
6
3
C
2
2 /
9
SIO
6
, B
are derived from the main clock, PLL clock or on-chip oscillator clock
2
” (undivided).
OUT
The function of the CLK
I/O port P9
f
f
f
f
Do not set
Do not set
Do not set
M
C
8
32
1
1
6
1
pin
C
, f
2 /
2
6
, f
) T
0
8
, f
OUT
32
, f
pin. Use the PCLK5 bit in the PCLKR register and
1SIO
OUT
, f
2SIO
pin
SIO
, f
8SIO
is used for UART0 to UART2.
, f
32SIO
7. Clock Generation Circuit
, f
AD
, f
C32
OUT
)
pin.