M30260F6AGP#D5 Renesas Electronics America, M30260F6AGP#D5 Datasheet - Page 235

• Manufacturer Part Number: M30260F6AGP#D5
• Description: IC M16C MCU FLASH 48K 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F6AGP#D5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

R
R
M
16. Programmable I/O Ports
16.1 Port Pi Direction Register (PDi Register, i = 1, 6 to 10)
16.2 Port Pi Register (Pi Register, i = 1, 6 to 10)
16.3 Pull-up Control Register 0 to Pull-up Control Register 2 (PUR0 to PUR2 Registers)
e
E
1
. v
J
6
0
The programmable input/output ports (hereafter referred to simply as “I/O ports”) consist of 39 lines P1
P1
P9
register, and can also be chosen to be or not be pulled high in sets of 4 lines.
Figures 16.1 to 16.4 show the I/O ports. Figure 16.5 shows the I/O pins.
Each pin functions as an I/O port, a peripheral function input/output.
For details on how to set peripheral functions, refer to each functional description in this manual. If any pin
is used as a peripheral function input, set the direction bit for that pin to “0” (input mode). Any pin used as an
output pin for peripheral functions is directed for output no matter how the corresponding direction bit is set.
Figure 16.1.1 shows the direction registers.
This register selects whether the I/O port is to be used for input or output. The bits in this register corre-
spond one for one to each port.
Figure 16.2.1 shows the Pi registers.
Data input/output to and from external devices are accomplished by reading and writing to the Pi register.
The Pi register consists of a port latch to hold the output data and a circuit to read the pin status. For ports
set for input mode, the input level of the pin can be read by reading the corresponding Pi register, and data
can be written to the port latch by writing to the Pi register.
For ports set for output mode, the port latch can be read by reading the corresponding Pi register, and data
can be written to the port latch by writing to the Pi register. The data written to the port latch is output from
the pin. The bits in the Pi register correspond one for one to each port.
Figure 16.3.1 shows the PUR0 to PUR2 registers.
The PUR0 to PUR2 registers select whether the ports, divided into groups of four ports, are pulled up or not.
The ports, selected by setting the bits in registers PUR2 to PUR0 to “1” (pull-up), are pulled up when the
direction registers are set to “0” (input mode). The ports are pulled up regardless of their function.
2
C
9
0 .
B
2 /
Note
P6
7
1
0
0
6
, P6, P7, P8, P9
, P10 for the 42-pin package. Each port can be set for input or output every line by using a direction
2
0
A
0
F
2
to P6
e
G
0 -
b
1 .
o r
2
0
, 5
u
0
3
p
, P9
2
0
(
M
0
7
2
1
6
and P9
C
page 216
0
2 /
to P9
6
, A
3
3
M
are not available in the 42-pin package.
, P10 for the 48-pin package, or 33 lines P1
1
f o
6
C
3
2
2 /
9
6
, B
M
1
6
C
2 /
6
) T
5
to P1
7
, P6
16. Programmable I/O Ports
4
to P6
7
, P7, P8, P9
5
0
to
to