M30260F6AGP#D5 Renesas Electronics America, M30260F6AGP#D5 Datasheet - Page 204

• Manufacturer Part Number: M30260F6AGP#D5
• Description: IC M16C MCU FLASH 48K 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F6AGP#D5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

R
R
M
e
E
1
. v
J
6
Figure 14.5 TB2SC Register
0
C
2
9
0 .
2 /
B
Timer B2 special mode register
0
b7
0
6
NOTES:
2
A
0
F
b6
0
2
1. Write to this register after setting the PRC1 bit in the PRCR register to "1" (write enabled).
2. If the INV11 bit is "0" (three-phase mode 0) or the INV06 bit is "1" (triangular wave modulation mode), set this bit to
3. When setting the IVPCR1 bit to "1" (three-phase output forcible cutoff by SD pin input enabled), Set the PD8_5 bit to
4. Related pins are U(P8
5. When this bit is used in delayed trigger mode 0, set the TB0EN and TB1EN bits to "1"(A/D trigger mode).
6. When setting the TB2SEL bit to "1" (underflow of TB2 interrupt generation frequency setting counter[ICTB2]), Set the
7. Refer to 16.6 Digital Debounce function for SD input.
e
G
0 -
b
"0" (timer B2 underflow).
"0" (= input mode).
pin and set the IVPCR1 bit to 0 after forcible cutoff, pins U, U, V, V, W, and W are exit from the high-impedance state.
If a low-level (“L”) signal is applied to the SD pin, three-phase motor control timer output will be disabled (INV03=0).
At this time, when the IVPCR1 bit is 0, pins U, U, V, V, W, and W become programmable I/O ports. When the IVPCR1
bit is set to 1, pins U, U, V, V, W, and W are placed in a high-impedance state regardless of which function of those
pins is used.
INV02 bit to "1" (three-phase motor control timer function).
o r
b5
0
1 .
2
0
u
, 5
b4
0
p
2
(
b3
0
M
0
7
1
b2
6
C
b1
page 185
2 /
6
b0
, A
0
Bit symbol
(b6-b5)
), U(P8
M
PWCOM
IVPCR1
TB2SEL
TB0EN
TB1EN
(b7)
1
Symbol
TB2SC
f o
6
C
3
1
2
2 /
), V(P7
9
6
Timer B0 Operation Mode
Select Bit
Three-Phase Output Port
SD Control Bit 1
Timer B1 Operation Mode
Select Bit
Timer B2 Reload Timing
Switch Bit
Trigger Select Bit
, B
Reserved bits
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
(1)
2
M
), V(P7
Address
1
039E
6
Bit name
C
(2)
3
16
2 /
), W(P7
(3, 4, 7)
6
) T
(6)
4
), W(P7
0 : TB2 interrupt
1 : Underflow of TB2 interrupt
0 : Timer B2 underflow
1 : Timer A output at odd-numbered
0 : Other than A/D trigger mode
1 : A/D trigger mode
0 : Three-phase output forcible cutoff
1 : Three-phase output forcible cutoff
0 : Other than A/D trigger mode
1 : A/D trigger mode
X0000000
5
After reset
Must set to "0"
). When a high-level ("H") signal is applied to the SD
generation frequency setting counter [ICTB2]
by SD pin input (high impedance)
disabled
by SD pin input (high impedance)
enabled
2
Function
(5)
(5)
14. A/D Converter
RW
RW
RW
RW
RW
RW
RW