HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 116

IC H8 MCU FLASH 128K 100QFP

HD64F3048BF25

Manufacturer Part Number
HD64F3048BF25
Description
IC H8 MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3048BF25

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 4 Exception Handling
4.3
Interrupt exception handling can be requested by seven external sources (NMI, IRQ
30 internal sources in the on-chip supporting modules. Figure 4.5 classifies the interrupt sources
and indicates the number of interrupts of each type.
The on-chip supporting modules that can request interrupts are the watchdog timer (WDT), refresh
controller, 16-bit integrated timer unit (ITU), DMA controller (DMAC), serial communication
interface (SCI), and A/D converter. Each interrupt source has a separate vector address.
NMI is the highest-priority interrupt and is always accepted * . Interrupts are controlled by the
interrupt controller. The interrupt controller can assign interrupts other than NMI to two priority
levels, and arbitrate between simultaneous interrupts. Interrupt priorities are assigned in interrupt
priority registers A and B (IPRA and IPRB) in the interrupt controller.
For details on interrupts see section 5, Interrupt Controller.
Note: * For the H8/3048F-ONE (single power supply with flash memory), the NMI input may
Rev. 3.00 Sep 27, 2006 page 88 of 872
REJ09B0325-0300
Notes: Numbers in parentheses are the number of interrupt sources.
Interrupts
be prohibited. For details, refer to section 18.8.4, NMI Input Disable Conditions.
1.
2.
Interrupts
When the watchdog timer is used as an interval timer, it generates an interrupt
request at every counter overflow.
When the refresh controller is used as an interval timer, it generates an interrupt
request at compare match.
Figure 4.5 Interrupt Sources and Number of Interrupts
External interrupts
Internal interrupts
NMI (1)
IRQ to IRQ (6)
WDT *
Refresh controller *
ITU (15)
DMAC (4)
SCI (8)
A/D converter (1)
0
1
(1)
5
2
(1)
0
to IRQ
5
) and

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