HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 366

• Manufacturer Part Number: HD64F3048BF25
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048BF25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 10 16-Bit Integrated Timer Unit (ITU)
Before selecting reset-synchronized PWM mode or complementary PWM mode, halt the timer
counter or counters that will be used in these modes.
When these bits select complementary PWM mode or reset-synchronized PWM mode, they take
precedence over the setting of the PWM mode bits (PWM4 and PWM3) in TMDR. Settings of
complementary PWM mode or reset-synchronized PWM mode and settings of timer sync bits
SYNC4 and SYNC3 in TSNC are valid simultaneously, however, when complementary PWM
mode is selected, channels 3 and 4 must not be synchronized (do not set bits SYNC3 and SYNC4
both to 1 in TSNC).
Bit 3—Buffer Mode B4 (BFB4): Selects whether GRB4 operates normally in channel 4, or
whether GRB4 is buffered by BRB4.
Bit 3: BFB4
0
1
Bit 2—Buffer Mode A4 (BFA4): Selects whether GRA4 operates normally in channel 4, or
whether GRA4 is buffered by BRA4.
Bit 2: BFA4
0
1
Bit 1—Buffer Mode B3 (BFB3): Selects whether GRB3 operates normally in channel 3, or
whether GRB3 is buffered by BRB3.
Bit 1: BFB3
0
1
Bit 0—Buffer Mode A3 (BFA3): Selects whether GRA3 operates normally in channel 3, or
whether GRA3 is buffered by BRA3.
Bit 0: BFA3
0
1
Rev. 3.00 Sep 27, 2006 page 338 of 872
REJ09B0325-0300
Description
GRB4 operates normally
GRB4 is buffered by BRB4
Description
GRA4 operates normally
GRA4 is buffered by BRA4
Description
GRB3 operates normally
GRB3 is buffered by BRB3
Description
GRA3 operates normally
GRA3 is buffered by BRA3
(Initial value)
(Initial value)
(Initial value)
(Initial value)