HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 565

• Manufacturer Part Number: HD64F3048BF25
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048BF25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Examples of Operation in GSM Mode
When switching between smart card interface mode and software standby mode, use the following
procedures to maintain the clock duty cycle.
Switching from smart card interface mode to software standby mode
1. Set the P9
2. Write 0 to the TE and RE bits in the serial control register (SCR) to stop transmit/receive
3. Write 0 to the CKE0 bit in SCR to stop the clock.
4. Wait for one serial clock cycle. During this period, the duty cycle is preserved and clock
5. Write H'00 to the serial mode register (SMR) and smart card mode register (SCMR).
6. Make the transition to the software standby state.
Returning from software standby mode to smart card interface mode
1. Clear the software standby state.
2. Set the CKE1 bit in SCR to the value for the fixed output state at the start of software
3. Set smart card interface mode and output the clock. Clock signal generation is started with
output state in software standby mode.
operations. At the same time, set the CKE1 bit to the value for the fixed output state in
software standby mode.
output is fixed at the specified level.
standby (the current P9
the normal duty cycle.
(1)(2)(3)
Figure 14.9 Procedure for Stopping and Restarting the Clock
Normal operation
4
data register (DR) and data direction register (DDR) to the values for the fixed
4
pin state).
(4) (5)(6)
Software standby
mode
(1) (2)(3)
Rev. 3.00 Sep 27, 2006 page 537 of 872
Section 14 Smart Card Interface
Normal operation
REJ09B0325-0300