HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 461

• Manufacturer Part Number: HD64F3048BF25
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048BF25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

11.3.3
Sample Setup Procedure for Normal TPC Output
Figure 11.4 shows a sample procedure for setting up normal TPC output.
ITU setup
Port and
TPC setup
ITU setup
Normal TPC Output
Figure 11.4 Setup Procedure for Normal TPC Output (Example)
Select counting operation
Select TPC output trigger
Set next TPC output data
Set next TPC output data
Select interrupt request
Set initial output data
Select GR functions
Normal TPC output
Enable TPC output
Select port output
Compare match?
Set GRA value
Start counter
Yes
Section 11 Programmable Timing Pattern Controller
No
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Set TIOR to make GRA an output compare
register (with output inhibited).
Set the TPC output trigger period.
Select the counter clock source with bits
TPSC2 to TPSC0 in TCR. Select the counter
clear source with bits CCLR1 and CCLR0.
Enable the IMFA interrupt in TIER.
The DMAC can also be set up to transfer
data to the next data register.
Set the initial output values in the DR bits
of the input/output port pins to be used for
TPC output.
Set the DDR bits of the input/output port
pins to be used for TPC output to 1.
Set the NDER bits of the pins to be used for
TPC output to 1.
Select the ITU compare match event to be
used as the TPC output trigger in TPCR.
Set the next TPC output values in the NDR bits.
Set the STR bit to 1 in TSTR to start the
timer counter.
At each IMFA interrupt, set the next output
values in the NDR bits.
Rev. 3.00 Sep 27, 2006 page 433 of 872
REJ09B0325-0300