HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 377

• Manufacturer Part Number: HD64F3048BF25
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048BF25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Bits 6 to 4—I/O Control B2 to B0 (IOB2 to IOB0): These bits select the GRB function.
Bit 6:
IOB2
0
1
Notes: 1. After a reset, the output is 0 until the first compare match.
Bit 3—Reserved: Read-only bit, always read as 1.
Bits 2 to 0—I/O Control A2 to A0 (IOA2 to IOA0): These bits select the GRA function.
Bit 2:
IOA2
0
1
Notes: 1. After a reset, the output is 0 until the first compare match.
2. Channel 2 output cannot be toggled by compare match. This setting selects 1 output
2. Channel 2 output cannot be toggled by compare match. This setting selects 1 output
Bit 5:
IOB1
0
1
0
1
Bit 1:
IOA1
0
1
0
1
instead.
instead.
Bit 4:
IOB0
0
1
0
1
0
1
0
1
Bit 0:
IOA0
0
1
0
1
0
1
0
1
Description
GRB is an output
compare register
GRB is an input
capture register
Description
GRA is an output
compare register
GRA is an input
capture register
Section 10 16-Bit Integrated Timer Unit (ITU)
No output at compare match (Initial value)
0 output at GRB compare match *
1 output at GRB compare match *
Output toggles at GRB compare match
(1 output in channel 2) *
GRB captures rising edge of input
GRB captures falling edge of input
GRB captures both edges of input
No output at compare match (Initial value)
0 output at GRA compare match *
1 output at GRA compare match *
Output toggles at GRA compare match
(1 output in channel 2) *
GRA captures rising edge of input
GRA captures falling edge of input
GRA captures both edges of input
Rev. 3.00 Sep 27, 2006 page 349 of 872
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