HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 213
HD64F3048BF25
Manufacturer Part Number
HD64F3048BF25
Description
IC H8 MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.DF3048BF25V.pdf
(903 pages)
Specifications of HD64F3048BF25
Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3048BF25
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD64F3048BF25V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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7.3.3
Refresh Request Interval and Refresh Cycle Execution
The refresh request interval is determined as in a DRAM interface, by the settings of RTCOR and
bits CKS2 to CKS0 in RTMCSR. The numbers of states required for pseudo-static RAM
read/write cycles and refresh cycles are the same as for DRAM (see table 7.4). The state
transitions are as shown in figure 7.3.
Figure 7.14 Setup Procedure for Multiple 2CAS
Pseudo-Static RAM Refresh Control
Address and 9-Bit Column Address (16-Mbyte Mode)
Set bits CKS2 to CKS0 in RTMCSR
Set P8 DDR to 1 for CS output
Wait for DRAM to be initialized
Set area 3 for 16-bit access
DRAM can be accessed
Write H'3F in RFSHCR
1
Set RTCOR
CAS
CAS
CAS 4-Mbit DRAM Chips with 9-Bit Row
Rev. 3.00 Sep 27, 2006 page 185 of 872
3
Section 7 Refresh Controller
REJ09B0325-0300
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