XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 212

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT84L38
OCTAL T1/E1/J1 FRAMER
The table below shows the combinations of Transmit Multiplex Enable bit and Transmit Interface Mode Select
[1:0] bits and the resulting Transmit Back-plane Interface data rates.
When the Transmit Multiplex Enable bit is set to zero, the framer is configured in non-channel-multiplexed mode.
The possible data rates are 1.544Mbit/s, MVIP 2.048Mbit/s, 4.096Mbit/s and 8.192Mbit/s. In non-channel-
multiplexed mode, payload data of each channel are taken from the Terminal Equipment separately. Each
channel uses its own Transmit Serial Clock, Transmit Serial Data, Transmit Single-frame Synchronization signal
and Transmit Multi-frame Synchronization signal as interface between the framer and the Terminal Equipment.
Section 4.1.2.1, 4.1.2.2 and 4.1.2.3 provide details on how to connect the Transmit Payload Data Interface block
with the Terminal Equipment when the Back-plane interface data rate is 1.544Mbit/s.
When the Back-plane interface data rate is MVIP 2.048Mbit/s, 4.096Mbit/s and 8.192Mbit/s, the Transmit Serial
Clock, Transmit Serial Data, Transmit Single-frame Synchronization signal and Transmit Multi-frame
Synchronization signal are all configured as inputs. The Transmit Serial Clock is always an input clock with
frequency of 1.544 MHz for all data rates. The TxMSync_n signal is configured as the Transmit Input Clock with
frequencies of 2.048 MHz, 4.096 MHz and 8.192 MHz respectively. It serves as the primary clock source for the
High-speed Back-plane Interface.
The table below summaries the clock frequencies of TxSerClk_n and TxInClk_n inputs when the framer is
operating in non-multiplexed High-speed Back-plane mode.
TRANSMIT MULTIPLEX ENABLE BIT = 0
When the Transmit Multiplex Enable bit is set to one, the framer is configured in channel-multiplexed mode. The
possible data rates are multiplexed 12.352Mbit/s, bit-multiplexed 16.384Mbit/s, HMVIP 16.384Mbit/s and H.100
16.384Mbit/s. In channel-multiplexed mode, every four channels share the Transmit Serial Data and Transmit
Single-frame Synchronization signal of one channel as interface between the framer and the local Terminal
Equipment. The TxMSync_n signal of one channel is configured as the Transmit Input Clock with frequencies of
12.352 MHz or 16.384. It serves as the primary clock source for the High-speed Back-plane Interface.
T
T
RANSMIT
M
RANSMIT
T
ODE
ABLE
S
ELECT
M
38: T
0
0
1
1
I
ULTIPLEX
NTERFACE
B
0
0
0
0
1
1
1
1
IT
RANSMIT
B
IT
1
E
NABLE
T
M
M
RANSMIT
ODE
ULTIPLEX
RESULTING
T
S
RANSMIT
ELECT
0
1
0
1
I
NTERFACE
S
E
ELECT
NABLE BIT AND
B
T
I
IT
RANSMIT
NTERFACE
0
0
1
1
0
0
1
1
0
B
IT
I
NTERFACE
1
MVIP 2.048Mbit/s
B
M
ACK
B
1.544Mbit/s
4.096Mbit/s
8.192Mbit/s
ODE
ACK
T
192
RANSMIT
-
PLANE
-
PLANE
D
ATA
T
RANSMIT
R
I
NTERFACE DATA RATES
ATE
I
NTERFACE
S
ELECT
I
NTERFACE
0
1
0
1
0
1
0
1
B
IT
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
T
M
X
0
S
ODE
M
ER
ODE
C
S
LK
ELECT
B
Bit Multiplexed 16.384Mbit/s
ACK
Multiplexed 12.352Mbit/s
HMVIP 16.384Mbit/s
H.100 16.384Mbit/s
[1:0]
-
MVIP 2.048Mbit/s
PLANE
T
1.544Mbit/s
4.096Mbit/s
8.192Mbit/s
X
MS
BITS WITH THE
R
2.048 MHz
4.096 MHz
8.192 MHz
I
NTERFACE
ATE
YNC
-
/T
REV. 1.0.1
X
I
N
C
D
LK
ATA