XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 283

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XRT84L38IB

Manufacturer Part Number
XRT84L38IB
Description
Network Controller & Processor ICs 8 Ch T1/E1 Framer
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT84L38IB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REV. 1.0.1
See
Interface block of the framer in 4.096Mbit/s mode.
The timing diagram of input signals to the framer when running at 4.096Mbit/s mode is shown in
(This interface mode is the same as running at 2.048 MHz. The only difference is that the Transmit Input Clock
runs four times faster at 8.192MHz)
When the Transmit Multiplex Enable bit is set to zero and the Transmit Interface Mode Select [1:0] bits are set
to 11, the Transmit Back-plane interface of framer is running at a clock rate of 8.192MHz.
The interface consists of the following pins:
F
F
6.1.3.3
IGURE
IGURE
TxSerClk (4MHz)
TxSerClk (2MHz)
TxSerClk (INV)
TxSer
TxSync(input)
TxChn[0]/TxSig
TxChClk(INV)
TxChn[1]/TxFrTD
Note: The following signals are not aligned with the signals shown above. The TxChClk is derived from 1.544MHz transmit clock.
Figure 71
71. I
72. T
NTERFACING
IMING DIAGRAM OF INPUT SIGNALS TO THE FRAMER WHEN RUNNING AT
E1 Transmit Input Interface - 8.192 MHz
below for how to interface the local Terminal Equipment with the Transmit Payload Data Input
F
Don't Care
Don't Care
XRT84L38
Equipment
Terminal
Don't Care
1
2
3
TO LOCAL TERMINAL EQUIPMENT USING
4
5
A B
6
TxSerClk_0
TxSer_0
TxInClk_0 (4.096MHz)
TxSync_0
TxSerClk_7
TxSer_7
TxInClk_7 (4.096MHz)
TxSync_7
C
7
8
D
1
1
Don't Care
2
2
3
3
4
263
4
5
A B
5
6
6
7
7
C
8
D
8
1
Don't Care
2
3
4
Data Input
Data Input
Transmit
Interface
Transmit
Interface
A B
5
Payload
Payload
Chn 0
Chn 7
6
XRT84L38
Don't Care
C
7
4.096M
D
8
Don't Care
4.096M
Don't care
OCTAL T1/E1/J1 FRAMER
BIT
/
S DATA BUS
BIT
/
S MODE
1
Don't Care
1
2
2
XRT84L38
3
Figure 72
3
4
4
A B
5
5
6
6
C
7
7
D
8
8
.

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