XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 381

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
When the Transmit Fractional E1 bit of the Transmit Interface Control Register (TICR) is set to 0, this pin is
configured as TxTSb[0]_n pin, it outputs bit 0 of the timeslot number of the E1 PCM data that is transmitting.
When the Transmit Fractional E1 bit of the Transmit Interface Control Register (TICR) is set to 1, this pin is
configured as TxSig_n pin, it acts as an input source for the signaling bits to be transmitted in the outbound E1
frames.
Figure 117
channel coincides with Bit 5 of the PCM data of that channel; Signaling Bit B coincides with Bit 6 of the PCM
data; Signaling Bit C coincides with Bit 7 of the PCM data and Signaling Bit D coincides with Bit 8 (LSB) of the
PCM data.
The table below shows configurations of the Transmit Fractional E1 bit of the Transmit Interface Control
Register (TICR).
TRANSMIT INTERFACE CONTROL REGISTER (TICR) (INDIRECT ADDRESS = 0XN0H, 0X20H)
The XRT84L38 framer can be configure to insert signaling bits provided by external equipment through the
Transmit Overhead TxOH_n input pins.
The TxOH_n pin can acts as an input source for the signaling bits to be transmitted in the outbound E1 frames.
When this pin is chosen as the input source for the signaling bits, any data presents on this pin in time slot 16
would be taken into the framer directly. The time slot 16 octet of the outbound E1 frame will be replaced by data
inputted from this pin in time slot 16.
Please note that the Signaling bit A of Channel 1-15 coincides with Bit 1 of the PCM data; Signaling bit B
Channel 1-15 coincides with Bit 2 of the PCM data; Signaling bit C Channel 1-15 coincides with Bit 3 of the
PCM; Signaling bit D Channel 1-15 coincides with Bit 4 of the PCM data.
Similarly, the Signaling bit A of Channel 17-31 coincides with Bit 5 of the PCM data; Signaling bit B Channel
17-31 coincides with Bit 6 of the PCM data; Signaling bit C Channel 17-31 coincides with Bit 7 of the PCM;
Signaling bit D Channel 17-31 coincides with Bit 8 of the PCM data.
F
11.4.3.3
IGURE
N
UMBER
B
TxSerClk (INV)
4
IT
117. T
TxSerClk
TxSer
below is a timing diagram of the TxSig_n input pin. Please note that the Signaling Bit A of a certain
TxSig
Insert Signaling Bits from TxOH_n Pin
IMING
Fractional E1
B
Transmit
IT
N
D
F
AME
IAGRAM OF THE
Timeslot 0
Input Data
A B
B
IT
R/W
C
T
YPE
D
T
X
S
IG
This READ/WRITE bit-field permits the user to determine which one of the
two functions the multiplexed I/O pin of TxTSb[0]_n/TxSig_n is spotting.
0 - This pin is configured as TxTSb[0]_n pin, it outputs bit 0 of the timeslot
number of the E1 PCM data that is transmitting.
1 - This pin is configured as TxSig_n pin, it acts as an input source for the
signaling bits to be transmitted in the outbound E1 frames
_
N
I
NPUT
Timeslot 5
Input Data
361
A B
C
D
Timeslot 6
Input Data
B
IT
D
A B
ESCRIPTION
C
D
OCTAL T1/E1/J1 FRAMER
Timeslot 23
Input Data
XRT84L38
A B
C
D
F