PIC24FJ16MC102-I/SP Microchip Technology, PIC24FJ16MC102-I/SP Datasheet - Page 101

• Manufacturer Part Number: PIC24FJ16MC102-I/SP
• Description: 16-bit Motor Control Family, 16 MIPS, 16KB Flash, 1KB RAM 28 SPDIP .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ16MC102-I/SP

• Featured Product: PIC24FJ/33FJ MCUs & dsPIC® DSCs
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 16 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (5.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.0
The PIC24FJ16MC101/102 devices provide the ability
to
managing clocking to the CPU and the peripherals. In
general, a lower clock frequency and a reduction in the
number of circuits being clocked constitutes lower
consumed power. PIC24FJ16MC101/102 devices can
manage power consumption in four different ways:
• Clock frequency
• Instruction-based Sleep and Idle modes
• Software-controlled Doze mode
• Selective peripheral control in software
Combinations of these methods can be used to selec-
tively tailor an application’s power consumption while
still maintaining critical application features, such as
timing-sensitive communications.
9.1
PIC24FJ16MC101/102 devices allow a wide range of
clock frequencies to be selected under application
control. If the system clock configuration is not locked,
users can choose low-power or high-precision
oscillators by simply changing the NOSC bits
(OSCCON<10:8>). The process of changing a system
clock during operation, as well as limitations to the
process, are discussed in more detail in
“Oscillator
EXAMPLE 9-1:
© 2011 Microchip Technology Inc.
PWRSAV #SLEEP_MODE
PWRSAV #IDLE_MODE
Note 1: This data sheet summarizes the features
manage
2: It
3: Some registers and associated bits
POWER-SAVING FEATURES
Clock Frequency and Clock
Switching
Configuration”.
of the PIC24FJ16MC101/102 family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 9. “Watchdog
Timer (WDT)” (DS39697) and Section
10.
(DS39698)
Reference Manual”, which are available
from
(www.microchip.com).
specifications in
cal Characteristics”
supercede any specifications that may be
provided in PIC24F Family Reference
Manual sections.
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
power
is
important
the
“Power-Saving
PWRSAV INSTRUCTION SYNTAX
consumption
in
Microchip
; Put the device into SLEEP mode
; Put the device into IDLE mode
the
Section 26.0 “Electri-
to
of this data sheet,
“PIC24F
note
by
web
Section 8.0
Features”
that
selectively
Family
site
the
Preliminary
in
9.2
PIC24FJ16MC101/102 devices have two special
power-saving modes that are entered through the
execution of a special PWRSAV instruction. Sleep mode
stops clock operation and halts all code execution. Idle
mode halts the CPU and code execution, but allows
peripheral modules to continue operation. The
assembler syntax of the PWRSAV instruction is shown in
Example
Sleep and Idle modes can be exited as a result of an
enabled interrupt, WDT time-out or a device Reset. When
the device exits these modes, it is said to wake-up.
9.2.1
The following occur in Sleep mode:
• The system clock source is shut down. If an
• The device current consumption is reduced to a
• The Fail-Safe Clock Monitor does not operate,
• The LPRC clock continues to run in Sleep mode if
• The WDT, if enabled, is automatically cleared
• Some device features or peripherals may continue
• Any peripheral that requires the system clock
The device will wake-up from Sleep mode on any of the
these events:
• Any interrupt source that is individually enabled
• Any form of device Reset
• A WDT time-out
On wake-up from Sleep mode, the processor restarts
with the same clock source that was active when Sleep
mode was entered.
on-chip oscillator is used, it is turned off.
minimum, provided that no I/O pin is sourcing
current
since the system clock source is disabled
the WDT is enabled
prior to entering Sleep mode
to operate. This includes items such as the input
change notification on the I/O ports, or peripherals
that use an external clock input.
source for its operation is disabled
Note:
PIC24FJ16MC101/102
Instruction-Based Power-Saving
Modes
9-1.
SLEEP MODE
SLEEP_MODE
constants defined in the assembler
include file for the selected device.
and
IDLE_MODE
DS39997B-page 101
are