PIC24FJ16MC102-I/SP Microchip Technology, PIC24FJ16MC102-I/SP Datasheet - Page 51

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PIC24FJ16MC102-I/SP

Manufacturer Part Number
PIC24FJ16MC102-I/SP
Description
16-bit Motor Control Family, 16 MIPS, 16KB Flash, 1KB RAM 28 SPDIP .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheet

Specifications of PIC24FJ16MC102-I/SP

Featured Product
PIC24FJ/33FJ MCUs & dsPIC® DSCs
Core Processor
PIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (5.5K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
5.0
The PIC24FJ16MC101/102 devices contain internal
Flash program memory for storing and executing
application code. The memory is readable, writable,
and erasable during normal operation over the entire
V
Flash memory can be programmed in two ways:
• In-Circuit Serial Programming™ (ICSP™)
• Run-Time Self-Programming (RTSP)
FIGURE 5-1:
© 2011 Microchip Technology Inc.
DD
programming capability
Note 1: This data sheet summarizes the features
range.
2: It
3: Some registers and associated bits
FLASH PROGRAM MEMORY
of the PIC24FJ16MC101/102 family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 4. “Program
Memory” (DS39715) in the “PIC24F
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com).
specifications in
cal Characteristics”
supercede any specifications that may be
provided in PIC24F Family Reference
Manual sections.
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
is
Using
Program Counter
Using
Table Instruction
User/Configuration
Space Select
important
ADDRESSING FOR TABLE REGISTERS
Section 26.0 “Electri-
to
of this data sheet,
note
1/0
0
TBLPAG Reg
that
8 bits
the
Preliminary
in
Program Counter
24-bit EA
24 bits
ICSP allows a device to be serially programmed while
in the end application circuit. This is done with two lines
for programming clock and programming data (one of
the alternate programming pin pairs: PGECx/PGEDx),
and three other lines for power (V
Master Clear (MCLR). This allows users to manufac-
ture boards with unprogrammed devices, and then pro-
gram the microcontroller just before shipping the
product. This also allows the most recent firmware or a
custom firmware to be programmed.
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
application can write program memory data in a single
program memory word, and erase program memory in
blocks or ‘pages’ of 512 instructions (1536 bytes).
5.1
Regardless of the method used, all programming of
Flash memory is done with the table-read and table-
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits <7:0> of the TBLPAG register and the
Effective Address (EA) from a W register specified in
the table instruction, as shown in
The TBLRDL and the TBLWTL instructions are used to
read or write to bits <15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits <23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
16 bits
PIC24FJ16MC101/102
Table Instructions and Flash
Programming
0
DD
Byte
Select
Figure
), ground (V
DS39997B-page 51
5-1.
SS
) and

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