PIC24FJ16MC102-I/SP Microchip Technology, PIC24FJ16MC102-I/SP Datasheet - Page 295

• Manufacturer Part Number: PIC24FJ16MC102-I/SP
• Description: 16-bit Motor Control Family, 16 MIPS, 16KB Flash, 1KB RAM 28 SPDIP .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ16MC102-I/SP

• Featured Product: PIC24FJ/33FJ MCUs & dsPIC® DSCs
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 16 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (5.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

APPENDIX A:
Revision A (February 2011)
This is the initial released version of this document.
TABLE A-1:
© 2011 Microchip Technology Inc.
High-Performance, Ultra Low Cost 16-bit
Microcontrollers
Section 1.0 “Device Overview”
Section 4.0 “Memory Organization”
Section 6.0 “Resets”
Section 8.0 “Oscillator Configuration”
Section 15.0 “Motor Control PWM Mod-
ule”
Section 19.0 “10-bit Analog-to-Digital
Converter (ADC)”
Section 22.0 “Charge Time
Measurement Unit (CTMU)”
Section Name
MAJOR SECTION UPDATES
REVISION HISTORY
The TMS, TDI, TDO, and TCK pin names were removed from these pin
diagrams:
• 28-pin SPDIP/SOIC/SSOP
• 28-pin QFN
• 36-pin TLA
Updated the Buffer Type to Digital for the CTED1 and CTED2 pins (see
Table
Updated the SR and CORCON SFRs in the CPU Core Register Map
(see
Updated the SFR Address for IC2CON, IC3BUF, and IC3CON in the
Input Capture Register Map (see
Added the VREGS bit to the RCON register in the System Control
Register Map (see
Added the VREGS bit to the RCON register (see
Updated the definition for COSC<2:0> = 001 and NOSC<2:0> = 001 in
the OSCCON register (see
Updated the title for
Assembly language.
Added
protected register unlock and fault clearing sequence.
Changed the bit PWMLOCK to PWMKEY in the PWM Key Unlock
Register (see
Updated the CH0 section and added Note 2 in both ADC block diagrams
(see
Updated the multiplexer values in the ADC Conversion Clock Period
Block Diagram (see
Added the 01110 bit definitions and updated the 01101 bit definitions
for the CH0SB<4:0> and CH0SA<4:0> bits in the AD1CHS0 register
(see
Removed Section 22.1 “Measuring Capacitance”, Section 22.2
“Measuring Time”, and Section 22.3 “Pulse Generation and Delay”
Updated the key features.
Added the CTMU Block Diagram (see
Updated the ITRIM<5:0> bit definitions and added Note 1 to the CTMU
Current Control register (see
Table
Figure 19-1
Register
Preliminary
1-1).
Example
4-1).
19-5).
Register
15-2, which provides a C code version of the write-
and
Revision B (June 2011)
This revision includes the following global updates:
• All JTAG references have been removed
All other major changes are referenced by their
respective section in
In addition, minor text and formatting changes were
incorporated throughout the document.
Table
Figure
Example 15-1
Figure
15-15).
4-24).
Update Description
PIC24FJ16MC101/102
19-3.
Register
19-2).
Register
Table
to include a reference to the
8-1).
22-3).
Figure
Table
4-6).
A-1.
22-1).
Register
DS39997B-page 295
6-1).