PIC24FJ16MC102-I/SP Microchip Technology, PIC24FJ16MC102-I/SP Datasheet - Page 96

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PIC24FJ16MC102-I/SP

Manufacturer Part Number
PIC24FJ16MC102-I/SP
Description
16-bit Motor Control Family, 16 MIPS, 16KB Flash, 1KB RAM 28 SPDIP .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheet

Specifications of PIC24FJ16MC102-I/SP

Featured Product
PIC24FJ/33FJ MCUs & dsPIC® DSCs
Core Processor
PIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (5.5K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC24FJ16MC101/102
REGISTER 8-1:
DS39997B-page 96
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
Note 1:
CLKLOCK
R/W-0
U-0
2:
Writes to this register require an unlock sequence. Refer to Section 6. “Oscillator” (DS39700) in the
“PIC24F Family Reference Manual” for details.
Direct clock switches between any primary oscillator mode with PLL and FRCPLL mode are not permitted.
This applies to clock switches in either direction. In these instances, the application must switch to FRC
mode as a transition clock source between the two PLL modes.
Unimplemented: Read as ‘0’
COSC<2:0>: Current Oscillator Selection bits (read-only)
111 = Fast RC Oscillator (FRC) with Divide-by-n
110 = Fast RC Oscillator (FRC) with Divide-by-16
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (S
011 = Primary Oscillator (MS, EC) with PLL
010 = Primary Oscillator (MS, HS, EC)
001 = Fast RC Oscillator (FRC) with Divide-by-n and with PLL (FRCPLL)
000 = Fast RC Oscillator (FRC)
Unimplemented: Read as ‘0’
NOSC<2:0>: New Oscillator Selection bits
111 = Fast RC Oscillator (FRC) with Divide-by-n
110 = Fast RC Oscillator (FRC) with Divide-by-16
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (S
011 = Primary Oscillator (MS, EC) with PLL
010 = Primary Oscillator (MS, HS, EC)
001 = Fast RC Oscillator (FRC) with Divide-by-n and PLL (FRCPLL)
000 = Fast RC Oscillator (FRC)
CLKLOCK: Clock Lock Enable bit
If clock switching is enabled and FSCM is disabled, (FOSC<FCKSM> = 0b01)
1 = Clock switching is disabled, system clock source is locked
0 = Clock switching is enabled, system clock source can be modified by clock switching
IOLOCK: Peripheral Pin Select Lock bit
1 = Peripherial pin select is locked, write to peripheral pin select registers not allowed
0 = Peripherial pin select is not locked, write to peripheral pin select registers allowed
LOCK: PLL Lock Status bit (read-only)
1 = Indicates that PLL is in lock, or PLL start-up timer is satisfied
0 = Indicates that PLL is out of lock, start-up timer is in progress or PLL is disabled
Unimplemented: Read as ‘0’
CF: Clock Fail Detect bit (read/clear by application)
1 = FSCM has detected clock failure
0 = FSCM has not detected clock failure
Unimplemented: Read as ‘0’
IOLOCK
R/W-0
R-0
OSCCON: OSCILLATOR CONTROL REGISTER
COSC<2:0>
y = Value set from Configuration bits on POR
W = Writable bit
‘1’ = Bit is set
LOCK
R-0
R-0
OSC
OSC
R-0
U-0
Preliminary
)
)
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/C-0
U-0
CF
R/W-y
(1)
U-0
© 2011 Microchip Technology Inc.
NOSC<2:0>
x = Bit is unknown
LPOSCEN
R/W-0
R/W-y
C = Clearable bit
(2)
OSWEN
R/W-y
R/W-0
bit 8
bit 0

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