PIC24FJ16MC102-I/SP Microchip Technology, PIC24FJ16MC102-I/SP Datasheet - Page 123

• Manufacturer Part Number: PIC24FJ16MC102-I/SP
• Description: 16-bit Motor Control Family, 16 MIPS, 16KB Flash, 1KB RAM 28 SPDIP .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ16MC102-I/SP

• Featured Product: PIC24FJ/33FJ MCUs & dsPIC® DSCs
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 16 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (5.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

11.0
The Timer1 module is a 16-bit timer, which can serve
as the time counter for the real-time clock, or operate
as a free-running interval timer/counter. Timer1 can
operate in three modes:
• 16-bit Timer
• 16-bit Synchronous Counter
• 16-bit Asynchronous Counter
FIGURE 11-1:
© 2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
2: It
3: Some registers and associated bits
TIMER1
of the PIC24FJ16MC101/102 family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 14. “Timers”
(DS39704)
Reference Manual”, which is available
from
(www.microchip.com).
specifications in
cal Characteristics”
supercede any specifications that may be
provided in PIC24F Family Reference
Manual sections.
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
SOSCO/
SOSCI
Set T1IF
T1CK
is
important
the
16-BIT TIMER1 MODULE BLOCK DIAGRAM
in
TGATE
Microchip
0
1
the
Section 26.0 “Electri-
to
Reset
Equal
of this data sheet,
“PIC24F
note
SOSCEN
web
that
Comparator
Family
TMR1
PR1
site
the
Preliminary
in
Q
Q
Gate
Sync
CK
T
CY
D
Timer1 also supports these features:
• Timer gate operation
• Selectable prescaler settings
• Timer operation during CPU Idle and Sleep
• Interrupt on 16-bit Period register match or falling
Figure 11-1
module.
To configure Timer1 for operation:
1.
2.
3.
4.
5.
6.
7.
modes
edge of external gate signal
Load the timer value into the TMR1 register.
Load the timer period value into the PR1
register.
Select the timer prescaler ratio using the
TCKPS<1:0> bits in the T1CON register.
Set the Clock and Gating modes using the TCS
and TGATE bits in the T1CON register.
Set or clear the TSYNC bit in T1CON to select
synchronous or asynchronous operation.
If interrupts are required, set the interrupt enable
bit, T1IE. Use the priority bits, T1IP<2:0>, to set
the interrupt priority.
Set the TON bit (= 1) in the T1CON register.
PIC24FJ16MC101/102
presents a block diagram of the 16-bit timer
TSYNC
1x
01
00
0
1
TON
TGATE
TCS
Sync
TCKPS<1:0>
1, 8, 64, 256
Prescaler
2
DS39997B-page 123