PIC24FJ16MC102-I/SP Microchip Technology, PIC24FJ16MC102-I/SP Datasheet - Page 131

• Manufacturer Part Number: PIC24FJ16MC102-I/SP
• Description: 16-bit Motor Control Family, 16 MIPS, 16KB Flash, 1KB RAM 28 SPDIP .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ16MC102-I/SP

• Featured Product: PIC24FJ/33FJ MCUs & dsPIC® DSCs
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 16 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (5.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13.0
The Input Capture module is useful in applications
requiring frequency (period) and pulse measurement.
The PIC24FJ16MC101/102 devices support up to eight
input capture channels.
FIGURE 13-1:
© 2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
ICx Pin
Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.
2: It
3: Some registers and associated bits
INPUT CAPTURE
of the PIC24FJ16MC101/102 family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 15. “Input
Capture” (DS39701) in the “PIC24F
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com).
specifications in
cal Characteristics”
supercede any specifications that may be
provided in PIC24F Family Reference
Manual sections.
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
is
Prescaler
(1, 4, 16)
Counter
important
3
INPUT CAPTURE BLOCK DIAGRAM
System Bus
ICxCON
ICM<2:0> (ICxCON<2:0>)
ICOV, ICBNE (ICxCON<4:3>)
Section 26.0 “Electri-
Mode Select
to
of this data sheet,
note
Edge Detection Logic
Clock Synchronizer
that
ICxI<1:0>
and
the
Preliminary
in
(in IFSn Register)
Set Flag ICxIF
Interrupt
Logic
The Input Capture module captures the 16-bit value of
the selected Time Base register when an event occurs
at the ICx pin. The events that cause a capture event
are listed below in three categories:
1.
2.
3.
Each Input Capture channel can select one of two
16-bit timers (Timer2 or Timer3) for the time base.
The selected timer can use either an internal or
external clock.
Other operational features include:
• Device wake-up from capture pin during CPU
• Interrupt on Input Capture event
• 4-word FIFO buffer for capture values:
• Use of Input Capture to provide additional
Sleep and Idle modes
- Interrupt optionally generated after 1, 2, 3, or
sources of external interrupts
Simple Capture Event modes:
• Capture timer value on every falling edge of
• Capture timer value on every rising edge of
Capture timer value on every edge (rising and
falling)
Prescaler Capture Event modes:
• Capture timer value on every 4th rising edge
• Capture timer value on every 16th rising
4 buffer locations are filled
input at ICx pin
input at ICx pin
of input at ICx pin
edge of input at ICx pin
PIC24FJ16MC101/102
FIFO
Logic
R/W
From 16-bit Timers
TMR2 TMR3
1
ICxBUF
16
0
DS39997B-page 131
16
ICTMR
(ICxCON<7>)