SPAKDSP303AG100 Freescale Semiconductor, SPAKDSP303AG100 Datasheet - Page 20

• Manufacturer Part Number: SPAKDSP303AG100
• Description: IC DSP 24BIT 100MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of SPAKDSP303AG100

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 24KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DSP56303 Overview
Further features of external memory include the following:
1.7 Internal Buses
To provide data exchange between the blocks, the DSP56303 implements the following buses:
The block diagram in Figure 1-1 illustrates these buses among other components. All internal
buses on the DSP56300 family members are 24-bit buses. The program data bus is also a 24-bit
bus.
1-10
Program memory expansion to one 256 K × 24-bit words memory space using the
standard external address lines
External memory expansion port
Simultaneous glueless interface to static random access memory (SRAM) and dynamic
random access memory (DRAM)
Peripheral I/O expansion bus to peripherals
Program memory expansion bus to program ROM
X memory expansion bus to X memory
Y memory expansion bus to Y memory
Global data bus between PCU and other core structures
Program data bus for carrying program data throughout the core
X memory data bus for carrying X data throughout the core
Y memory data bus for carrying Y data throughout the core
Program address bus for carrying program memory addresses throughout the core
X memory address bus for carrying X memory addresses throughout the core
Y memory address bus for carrying Y memory addresses throughout the core.
DSP56303 User’s Manual, Rev. 2
Freescale Semiconductor