SPAKDSP303AG100 Freescale Semiconductor, SPAKDSP303AG100 Datasheet - Page 245

• Manufacturer Part Number: SPAKDSP303AG100
• Description: IC DSP 24BIT 100MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of SPAKDSP303AG100

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 24KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Programming Reference
This reference for programmers includes a table showing the addresses of all DSP
memory-mapped peripherals, an exception priority table, and programming sheets for the major
programmable DSP registers. The programming sheets are grouped in the following order:
central processor, Phase Lock Loop (PLL), Host Interface (HI08), Enhanced Synchronous Serial
Interface (ESSI), Serial Communication Interface (SCI), Timer, and GPIO. Each sheet provides
room to write in the value of each bit and the hexadecimal value for each register. You can
photocopy these sheets and reuse them for each application development project. For details on
the instruction set of the DSP56300 family of DSPs, see the DSP56300 Family Manual.
Freescale Semiconductor
Processor
Module
Central
DMA
IPR
PLL
BIU
addresses of all internal peripherals.
sources.
specific interrupts within interrupt priority levels.
The programming sheets appear in this manual as figures (listed in Table B-1); they show
the major programmable registers on the DSP56303.
Table B-2, Internal I/O Memory Map (X Data Memory), on page B-2 lists the memory
Table B-3, Interrupt Sources, on page B-6 lists the interrupt starting addresses and
Table B-4, Interrupt Source Priorities Within an IPL, on page B-8 lists the priorities of
Figure B-1, "Status Register (SR)"
Figure B-2, "Operating Mode Register (OMR)"
Figure B-3, "Interrupt Priority Register-Peripherals (IPRP)"
Figure B-3, "Interrupt Priority Register-Peripherals (IPRP)"
Figure B-4, "Phase-Locked Loop Control Register (PCTL)"
Figure B-5, "Bus Control Register (BCR)"
Figure B-6, "DRAM Control Register (DCR)"
Figure B-7, "Address Attribute Registers (AAR[3–0])"
Figure B-8, "DMA Control Registers 5–0 (DCR[5–0])"
Table B-1. Guide to Programming Sheets
DSP56303 User’s Manual, Rev. 2
Programming Sheet
page B-10
page B-11
page B-12
page B-12
page B-13
page B-14
page B-15
page B-16
page B-17
Page
B
B-1