SPAKDSP303AG100 Freescale Semiconductor, SPAKDSP303AG100 Datasheet - Page 41

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SPAKDSP303AG100

Manufacturer Part Number
SPAKDSP303AG100
Description
IC DSP 24BIT 100MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheets

Specifications of SPAKDSP303AG100

Interface
Host Interface, SSI, SCI
Clock Rate
100MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
24kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
144-LQFP
Device Core Size
24b
Clock Freq (max)
100MHz
Mips
100
Device Input Clock Speed
100MHz
Ram Size
24KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SPAKDSP303AG100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
2.11 Timers
The DSP56303 has three identical and independent timers. Each can use internal or external
clocking, interrupt the DSP56303 after a specified number of events (clocks), or signal an
external device after counting a specific number of internal events.
Freescale Semiconductor
TIO0
RXD
PE0
TXD
PE1
SCLK
PE2
Notes: 1.
Signal
Signal
Name
Name
Input or
Output
Input
Input or
Output
Output
Input or
Output
Input/Output
Input or
Output
The Wait processing state does not affect the signal state.
Type
Type
Input
Input
Input
Input
Reset
Table 2-14. Serial Communication Interface (SCI)
Reset
State During
State During
Disconnected
Disconnected
Disconnected
Disconnected
Table 2-15. Triple Timer Signals
internally
internally
internally
internally
Stop
Stop
DSP56303 User’s Manual, Rev. 2
1
1
Serial Receive Data
Receives byte-oriented serial data and transfers it to the SCI
receive shift register.
Port E 0
The default configuration following reset is GPIO. When configured
as PE0, signal direction is controlled through the Port E Directions
Register (PRRE). This signal is configured as RXD or PE0 through
the Port E Control Register (PCRE). This input is 5 V tolerant.
Serial Transmit Data
Transmits data from SCI transmit data register.
Port E 1
The default configuration following reset is GPIO. When configured
as PE1, signal direction is controlled through the SCI PRRE. This
signal is configured as TXD or PE1 through PCRE. This input is 5 V
tolerant.
Serial Clock
Provides the input or output clock used by the transmitter and/or
the receiver.
Port E 2
The default configuration following reset is GPIO. For PE2, signal
direction is controlled through the SCI PRRE. This signal is
configured as SCLK or PE2 through PCRE. This input is 5 V
tolerant.
Timer 0 Schmitt-Trigger Input/Output
As an external event counter or in Measurement mode, TIO0 is
input. In Watchdog, Timer, or Pulse Modulation mode, TIO0 is
output. The default mode after reset is GPIO input. This can be
changed to output or configured as a Timer Input/Output through
the Timer 0 Control/Status Register (TCSR0). This input is 5 V
tolerant.
Signal Description
Signal Description
Timers
2-17

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